|Free Silicon Conference 2023|
|Genre||Free software and free hardware development conference|
|Location(s)||Paris, Sorbonne Université|
The 2023 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 10,11,12 2023 (Monday to Wednesday). This event will build on top of the past FSiC2019 and FSiC2022 editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification. After the daily talks, the discussion will continue until late in an informal and relaxed atmosphere.
February 16: submissions are open.
Objectives and motto
The goal of FSiC is to make the technology accessible to small businesses, startups, universities and schools. Students, makers and professional should have direct access to education, without barriers, paywalls and legal burdens. What's the value of multi-billion public investments if there aren't designers, engineers and other experts who can operate the industry and who master the tools to innovate? We all took apart watches and radios when we were kids, hence we learned how they work. It is time to look inside chips and their tool-chains so that we can study, improve, repair and trust them.
The conference motto is therefore: Education, sustainability and innovation by openness and collaboration!
For proposing a talk, please submit a title and a short summary at fsic2023 'at' f-si.org before May 31.
Participation to the conference is free of charge but the attendance must be reserved per email at fsic2023 'at' f-si.org. Details will be announced on this page and over the mastodon channel. The slides and the video recordings of the talks will be published on our website.
List of confirmed speakers
- Lukas Hartmann (MNT Research), The road to fully open hardware mobile computing
High-level design and logic-synthesis
- Martin Schoeberl (DTU Compute), Software-Defined Hardware: Digital Design in the 21st Century with Chisel
- Loïc Sylvestre (Macle), Mixing software abstractions for high-level FPGA programming
- Tristan Gingold (GHDL), Toward multi-language open-source HDL simulation
- N. Engelhardt (YosysHQ GmbH), Recent Developments from YosysHQ
- Benjamin Barzen (ABC), ABC+Yosys (tentative)
- Jean Bruant (OVHcloud), Open-source Electronic Design Automation for Agile Network Defense at OVHcloud
- Gaëtan Cassiers (TU Graz), Physical security for cryptographic implementations with open hardware
- Pat Deegan (Psychogenic Technologies), Black-tie Python: Formal verification with Amaranth
On-going FOS silicon projects
- Matthew Venn (YosysHQ, ChipFlow), TinyTapeout - what happened and next steps
- Thomas Parry (SPHERICAL), Powered by Open EDA: Applying Apple's Chip-to-Product Design Methods to Satellites
- Tim Edwards (Open Circuit Design), Open-frame version of the Caravel harness chip
- Manuel Moser and Harald Pretl (Johannes Kepler University Linz), Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology
Foundries and PDKs
- Staf Verhaegen (Chips4Makers), Proof-of-concept for scalable analog blocks using the PDKMaster framework
- Rene Scholz and Sergei Andreev (IHP Microelectronics), Open source Design Flow status and roadmap for IHP BiCMOS technology
Transistor modelling and circuit simulation
- Felix Salfelder (GnuCap), Verilog-AMS in Gnucap
Back-end design tools
- Gabriel Gouvine (Coriolis), title to be announced
- Dan Fritchman (Layout21), Layout21 (tentative)
- Christophe Alexandre (Naja), Naja: project updates and netlist splitting tool
- Pavel Smirnov (IQM), KQCircuits – open-source EDA software for designing chips with super conducting qubits
- Jean-Paul Chaput (LIP6, Sorbonne Université), Coriolis a RTL to GDSII FOSS Design Flow
- Matthias Köfferlein (KLayout), Learning from GF180 PDK: Best practices for implementing and optimizing KLayout DRC and LVS decks
- Michiel Lenaars (NLnet Foundation), An overview of libre silicon and OSHW related efforts within NGI and NLnet
Open-source standards and certifications
- Martin Häuer (Open Source Ecology Germany e. V.), Standardizing Open Source Hardware, meet DIN SPEC 3105 – What has been done, what comes next and why this is awesome
Teaching and education
- Martin Schoeberl (DTU Compute), Teaching Chip Design with Open-Source Tools
- Maxime Pelcat (Univ Rennes, INSA Rennes), Environmental impacts of electronics and the role of open source hardware
- Amael Parreaux-Ey (resilio), How to foster GreenIT through open hardware?
- David Bol (ICTEAM Institute, UC Louvain), title to be announced
- Julia Hess (Stiftung Neue Verantwortung), title to be announced
We are looking for sponsors to cover extra services at the conference, such as food and beverages. In case of interest, please write at fsic2023 'at' f-si.org.
This conference is funded by the EU HORIZON Coordination and Support Action GoIT project with ID number 101070669.