Mixing software abstractions for high-level FPGA programming
- Speaker(s): Loïc Sylvestre
- email: loic.sylvestre#lip6.fr
This talk will present two experiments in programming language design and implementation on FPGA.
The first is an implementation of the OCaml langage on a softcore processor with hardware acceleration of user-defined functions (by compilation to RTL) and language extension to exploit data-parallelism.
The second provides a cycle-accurate language, compiled to RTL, to program embedded reactive systems mixing interaction and computation on FPGA.
- The software wishes to interface with the following tools: GHDL (https://github.com/ghdl), GTKWave (https://github.com/gtkwave), Yosys (https://github.com/YosysHQ/yosys)
- The project seeks help on: FPGA programming, hardware acceleration, reactive programming, design and implementation of embedded systems
Sylvestre, L., Chailloux, E., & Sérot, J. (2023). Accelerating OCaml programs on FPGA. International Journal of Parallel Programming, 51(2-3), 186-207.
Sylvestre, L., Sérot, J., & Chailloux, E. (2022, May). A Virtual Machine Approach for High-level FPGA Programming. In 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) (pp. 1-1). IEEE.