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Showing below up to 50 results in range #101 to #150.
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- Black-tie Python: Formal verification with Amaranth (22:21, 28 July 2023)
- Exploring open hardware solutions for ensuring the security of RISC-V processors (22:21, 28 July 2023)
- A Yosys plugin for logic locking (22:22, 28 July 2023)
- All you ever wanted to know about side-channel attacks and protections (and a forthcoming book) (22:22, 28 July 2023)
- Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology (22:22, 28 July 2023)
- Verilog-AMS in Gnucap (22:23, 28 July 2023)
- How to foster GreenIT through open hardware? (22:24, 28 July 2023)
- The importance of EU Academia in developing the chips of the future (22:25, 28 July 2023)
- Open (and Closed) Source Analog Design with Hdl21 & VLSIR (22:26, 28 July 2023)
- An overview of libre silicon and OSHW related efforts within NGI and NLnet (22:27, 28 July 2023)
- KQCircuits – open-source EDA software for designing chips with super conducting qubits (22:28, 28 July 2023)
- Coriolis a RTL to GDSII FOSS Design Flow (22:28, 28 July 2023)
- Learning from GF180 PDK: Best practices for implementing and optimizing KLayout DRC and LVS decks (22:29, 28 July 2023)
- Teaching Chip Design with Open-Source Tools (22:29, 28 July 2023)
- Learning hardware design in the video game Minecraft (22:29, 28 July 2023)
- Accelerating the Open Source Silicon Ecosystem with Jupyter Notebooks (22:29, 28 July 2023)
- OpenROAD (12:09, 11 August 2023)
- The road to fully open hardware mobile computing (15:08, 24 August 2023)
- Introduction to the GoIT project (15:11, 24 August 2023)
- Welcome from LIP6 (16:23, 24 August 2023)
- Welcome from the Free Silicon Foundation 2023 (16:24, 24 August 2023)
- Recommendations for the EC on how to reduce the environmental impact of the ICT sector (22:10, 30 September 2023)
- FSiC2023 (17:08, 1 October 2023)
- FSiC2022 (17:09, 1 October 2023)
- FSiC2019 (17:09, 1 October 2023)
- Environmental impacts of electronics and the role of open source hardware (16:34, 20 October 2023)
- Recommendations and roadmap for the development of open-source silicon in the EU (19:13, 3 November 2023)
- Gdsfactory (11:21, 6 March 2024)
- Statute of the Free Silicon Foundation (I) ETS (17:47, 28 March 2024)
- Guidelines for speakers (19:17, 22 April 2024)
- Verilog-A Circuit Analysis Kernel (VACASK) (08:54, 23 April 2024)
- F-Si Statute (14:57, 8 May 2024)
- FSiC2024 venue (20:05, 8 May 2024)
- Tender for GPL-compatible hardware licence development (11:37, 28 May 2024)
- Title to be announced (15:36, 17 June 2024)
- The European Union must keep funding free software open letter (20:50, 17 July 2024)
- The EPFL Logic Synthesis Libraries: open-source tools for classical and emerging technologies (15:24, 1 August 2024)
- The long tail of semiconductors - Education, Tools and Artisanal ASICs (15:26, 1 August 2024)
- How to debug a simulation? (15:27, 1 August 2024)
- It's nice to have a choice: using Haskell for circuit design (15:28, 1 August 2024)
- Open-Source Verification of Digital ASIC/FPGA Circuits (15:30, 1 August 2024)
- Moving toward VexiiRiscv (15:32, 1 August 2024)
- The ACT EDA flow for asynchronous logic (15:33, 1 August 2024)
- Update on IHP open source PDK initiative & how to submit free open source designs in IHP technology (15:34, 1 August 2024)
- Revolutionize your chip design with GDSFactory and Open Source PDKs (15:36, 1 August 2024)
- Mixed signal support on Tiny Tapeout (15:38, 1 August 2024)
- Caravel Panamax: The Next Generation (15:38, 1 August 2024)
- Achieving Competitive Performance with Open EDA Tools on a 2MGE Open-Source Linux-Capable RISC-V SoC (15:39, 1 August 2024)
- An opensource Wi-Fi chip, What, Why and How? (15:40, 1 August 2024)
- Unlocking the power: energy management open-source analog building blocks from concept to silicon-proven IP (15:40, 1 August 2024)