How to debug a simulation?
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- Speaker(s): Tristan Gingold
- email: tgingold@free.fr
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Abstract
Starting from a real case (development of a Zynq Ultrascale+ board), I'd like to present how open-source tools (HDL simulators but not only) can be used instead of proprietary tools. Despite many restrictions (such as poor integration or no access to encrypted models), there are still several advantages (like no restrictions on the number of licenses). It is still relatively easy to write testbenches for design blocks and investigate issues. I'd like to discuss about investigating simulation issues: either incorrect behaviour detected by a testbench or on the real hardware, but also errors detected by the language that might happen during elaboration, synthesis or simulation.
Software
General information
- Repository: https://github.com/ghdl/ghdl