FSiC2023

Free Silicon Conference 2023
Genre	Free software and free hardware development conference
Location(s)	Paris, Sorbonne Université
Country	France
Website	wiki.f-si.org/index.php/FSiC2023

The 2023 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 10,11,12 2023 (Monday to Wednesday). This event will build on top of the past FSiC2019 and FSiC2022 editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification. After the daily talks, the discussion will continue until late in an informal and relaxed atmosphere.

News

February 16: submissions are open.

Objectives and motto

The goal of FSiC is to make the technology accessible to small businesses, startups, universities and schools. Students, makers and professional should have direct access to education, without barriers, paywalls and legal burdens. What's the value of multi-billion public investments if there aren't designers, engineers and other experts who can operate the industry and who master the tools to innovate? We all took apart watches and radios when we were kids, hence we learned how they work. It is time to look inside chips and their tool-chains so that we can study, improve, repair and trust them.

The conference motto is therefore: Education, sustainability and innovation by openness and collaboration!

Submission

For proposing a talk, please submit a title and a short summary at fsic2023 'at' f-si.org before June 15.

Participation

Participation to the conference is free of charge but the attendance must be reserved per email at fsic2023 'at' f-si.org. Details will be announced on this page and over the mastodon channel. The slides and the video recordings of the talks will be published on our website.

Organizing committee

Marie-Minerve Louerat

Scientist and Teacher

https://www-soc.lip6.fr/users/marie-minerve-louerat

‟I have a passion for educating and teaching students, to give them tools for life and learning.”

Luca Alloatti

Libre Hardware Promoter

https://orcid.org/0000-0002-1245-4179

‟Technology is political. I stand for defending free access to technology and the right for transparency.”

Thomas Kramer

Skeptical Technology Enthusiast

https://libreda.org

‟I like to understand technology, to adapt and enhance it. Technology should not be mythical or owned by experts only, it needs to be comprehensible.”

Matthias Köfferlein

FOSS EDA Author

https://www.klayout.org

‟I am passionate about helping people with my technical skills. Coding EDA is like gardening to me: may it grow and feed people.”

Tentative conference program

The conference program below might still undergo changes.

July 10, Monday (Day 1)

• 9:00-9:30, Registration and coffee

Welcome

• 9:30-9:45, Welcome from the LIP6
• 9:45-9:55, Welcome from the Free Silicon Foundation

Keynote speech

• 10:00-10:30, Lukas Hartmann (MNT Research), The road to fully open hardware mobile computing

High-level design and logic-synthesis

• 10:30-11:00, Martin Schoeberl (DTU Compute), Software-Defined Hardware: Digital Design in the 21st Century with Chisel
• 11:00-11:30, Charles Papon (SpinalHDL), A progressive introduction to memory bus interconnect API in Software-Defined Hardware
• 11:30-12:00, Loïc Sylvestre (Macle), Mixing software abstractions for high-level FPGA programming
• 12:00-13:30, lunch break
• 13:30-14:00, Tristan Gingold (GHDL), Toward multi-language open-source HDL simulation
• 14:00-14:30, N. Engelhardt (YosysHQ GmbH), Recent Developments from YosysHQ
• 14:30-15:00, Benjamin Barzen (ABC), ABC+Yosys (tentative)
• 15:00-15:30, Thomas Benz (ETH Zurich), Industry-Grade SystemVerilog IPs And The Open Flow: How We Synthesized Iguana

Foundries and PDKs

• 15:30-16:00, Staf Verhaegen (Chips4Makers), Proof-of-concept for scalable analog blocks using the PDKMaster framework
• 16:00-16:30, Afternoon break. Coffee is served on-campus
• 16:30-17:00, Rene Scholz and Sergei Andreev (IHP Microelectronics), Open source Design Flow status and roadmap for IHP BiCMOS technology

On-going FOS silicon projects

• 17:00-17:30, Matthew Venn (YosysHQ, ChipFlow), TinyTapeout - what happened and next steps
• 17:30-18:00, Thomas Parry (SPHERICAL), Powered by Open EDA: Applying Apple's Chip-to-Product Design Methods to Satellites

Sustainability (part 1)

• 18:00-18:45, David Bol (ICTEAM Institute, UC Louvain), Analyzing open-source chip design ecosystem from an environmental sustainability perspective

July 11, Tuesday (Day 2)

• 8:30-9:30, Early bird coffee and tea

Keynote speech

• 9:30-10:00, Luca Weiss (Fairphone), Open Source for Sustainable and Long lasting Phones

Hardware security

• 10:00-10:30, Jean Bruant (OVHcloud), Open-source electronic design automation for agile network defense at OVHcloud
• 10:30-11:00, Gaëtan Cassiers (TU Graz), Physical security for cryptographic implementations with open hardware
• 11:00-11:30, Pat Deegan (Psychogenic Technologies), Black-tie Python: Formal verification with Amaranth
• 11:30-12:00, Pablo Navarro (Seville Institute of Microelectronics), Exploring open hardware solutions for ensuring the security of RISC-V processors
• 12:00-13:30, lunch break
• 13:30-14:00, Gabriel Gouvine (LIP6), Logic Locking
• 14:00-14:30, Wei Cheng, Sylvain Guilley, and Olivier Rioul (Telecom Paris and Secure IC), All you ever wanted to know about side-channel attacks and protections (and a forthcoming book)

IP blocks

• 14:30-15:00, Manuel Moser and Harald Pretl (Johannes Kepler University Linz), Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology

Transistor modelling and circuit simulation

• 15:00-15:30, Felix Salfelder (GnuCap), Verilog-AMS in Gnucap

Sustainability (part 2)

• 15:30-16:00, Maxime Pelcat (Univ Rennes, INSA Rennes), Environmental impacts of electronics and the role of open source hardware
• 16:00-16:30, Afternoon break. Coffee is served on-campus
• 16:30-17:00, Amael Parreaux-Ey (resilio), How to foster GreenIT through open hardware?
• 17:00-17:30, Julia Hess (Stiftung Neue Verantwortung), title to be announced

Open-source standards and certifications

• 17:30-18:00, Martin Häuer (Open Source Ecology Germany e. V.), Standardizing Open Source Hardware, meet DIN SPEC 3105 – What has been done, what comes next and why this is awesome

Funding opportunities

• 18:00-18:30, Michiel Lenaars (NLnet Foundation), An overview of libre silicon and OSHW related efforts within NGI and NLnet

July 12, Wednesday (Day 3)

• 8:30-9:30, Early bird coffee and tea

Back-end design tools

• 9:30-10:00, Dan Fritchman (Layout21), Layout21 (tentative)
• 10:00-10:30, Christophe Alexandre (Naja), Naja: project updates and netlist splitting tool
• 10:30-11:00, Pavel Smirnov (IQM), KQCircuits – open-source EDA software for designing chips with super conducting qubits
• 11:00-11:30, Jean-Paul Chaput (LIP6, Sorbonne Université), Coriolis a RTL to GDSII FOSS Design Flow
• 11:30-12:00, Matthias Köfferlein (KLayout), Learning from GF180 PDK: Best practices for implementing and optimizing KLayout DRC and LVS decks
• 12:00-13:30, lunch break

Teaching and education

• 13:30-14:00, Martin Schoeberl (DTU Compute), Teaching Chip Design with Open-Source Tools
• 14:00-14:30, Gabriel Doriath Döhler (École normale supérieure), Learning hardware design in the video game Minecraft
• 14:30-15:00, Johan Euphrosine (Google), Accelerating the Open Source Silicon Ecosystem with Jupyter Notebooks

Paving the road for open source flow: gaps, challenges, opportunities

• 15:00-15:30, open discussion
• 15:30-16:00, conclusions

Donations

We are looking for sponsors to cover extra services at the conference, such as food and beverages. In case of interest, please write at fsic2023 'at' f-si.org.

Academic Sponsors

Acknowledgements

This conference is funded by the EU HORIZON Coordination and Support Action GoIT project with ID number 101070669.