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Showing below up to 20 results in range #11 to #30.

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11. 65nm CMOS Design-Flows on Free and Open-Source Tools : An Overview‏‎ (23 revisions)
12. Standard-cell characterization‏‎ (19 revisions)
13. FSiC2020‏‎ (18 revisions)
14. FOS standard cell generator from scratch‏‎ (18 revisions)
15. SystemC AMS and upcoming free frameworks for the free design‏‎ (15 revisions)
16. OpenRAM: An Open-Source Memory Compiler‏‎ (15 revisions)
17. Horizon 2021 Coordination and Support Action (CSA) proposal‏‎ (14 revisions)
18. KLayout's deep verification base project‏‎ (13 revisions)
19. Closing The Synthesis Gap — Is Open Source Logic Synthesis About To Beat The Industry?‏‎ (13 revisions)
20. Hands-on with KLayout: Design rule checks and layout to netlist tools‏‎ (13 revisions)
21. Inclusive Modeling with SysMD‏‎ (13 revisions)
22. From filters to CMOS transistors - A library of analog schematics with automated sizing‏‎ (12 revisions)
23. VACASK: a Verilog-A Circuit Analysis Kernel‏‎ (12 revisions)
24. Industry-Grade SystemVerilog IPs And The Open Flow: How We Synthesized Iguana‏‎ (10 revisions)
25. Mixing software abstractions for high-level FPGA programming‏‎ (10 revisions)
26. FSiC2019 venue‏‎ (10 revisions)
27. Teaching Chip Design with Open-Source Tools‏‎ (10 revisions)
28. Software-Defined Hardware: Digital Design in the 21st Century with Chisel‏‎ (9 revisions)
29. Open Source Parasitic Extraction‏‎ (9 revisions)
30. LibreCell‏‎ (9 revisions)

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