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Showing below up to 20 results in range #41 to #60.
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- (hist) Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design [2,058 bytes]
- (hist) Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes [2,043 bytes]
- (hist) Verilog-A Circuit Analysis Kernel (VACASK) [2,000 bytes]
- (hist) FSiC2019 venue [1,982 bytes]
- (hist) Industry-Grade SystemVerilog IPs And The Open Flow: How We Synthesized Iguana [1,950 bytes]
- (hist) Environmental impacts of electronics and the role of open source hardware [1,879 bytes]
- (hist) E-Waste Reverse Engineering Toolkit (RET) [1,844 bytes]
- (hist) 65nm CMOS Design-Flows on Free and Open-Source Tools : An Overview [1,835 bytes]
- (hist) The Raven chip: First-time silicon success with qflow and efabless [1,824 bytes]
- (hist) Open source Design Flow status and roadmap for IHP BiCMOS technology [1,823 bytes]
- (hist) Converting 45nm transistor netlists to open standards [1,798 bytes]
- (hist) OpenRAM: An Open-Source Memory Compiler [1,792 bytes]
- (hist) Toward a collaborative environment for Open Hardware Design [1,735 bytes]
- (hist) Tutorial and FAQ on physical verification, DRC+LVS [1,728 bytes]
- (hist) OpenEPDA: photonic PDKs with open standards [1,720 bytes]
- (hist) Teaching Chip Design with Open-Source Tools [1,610 bytes]
- (hist) TestPageX [1,585 bytes]
- (hist) Standard-cell recognition [1,543 bytes]
- (hist) Mixing software abstractions for high-level FPGA programming [1,540 bytes]
- (hist) The EPFL Logic Synthesis Libraries: open-source tools for classical and emerging technologies [1,536 bytes]