Difference between revisions of "FSiC2023"

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== Tentative program ==
== List of confirmed speakers ==
===High-level design===
 
===Hardware security===
==== Keynote speech ====
===On-going FOS silicon projects===
* Lukas Hartmann ([https://mntre.com/ MNT Research]), ''[[The road to fully open hardware mobile computing]]''
===Memories===
 
===Foundries and PDKs===
====High-level design and logic-synthesis====
===Transistor modelling===
* Martin Schoeberl ([https://www.imm.dtu.dk/~masca/ DTU Compute]), ''[[Chisel]]''
===Place-and-route tools===
* Loïc Sylvestre ([https://github.com/lsylvestre/macle Macle]), ''[[title to be announced]]''
===Parasitic extraction===
* Tristan Gingold ([http://ghdl.free.fr/ GHDL]), ''[[Toward multi-language open-source HDL simulation]]''
===Design rule checking===
* N. Engelhardt ([https://www.yosyshq.com/ YosysHQ GmbH]), ''[[Recent Developments from YosysHQ]]''
===Schematic editors===
* Benjamin Barzen ([https://github.com/berkeley-abc/abc ABC]), ''[[ABC+Yosys (tentative)]]''
===Photonics===
 
===Sustainability===
====Hardware security====
* Jean Bruant ([https://www.ovhcloud.com OVHcloud]), ''[[Open-source Electronic Design Automation for Agile Network Defense at OVHcloud]]''
* Gaëtan Cassiers ([https://www.iaik.tugraz.at/ TU Graz]), ''[[Physical security for cryptographic implementations with open hardware]]''
* Pat Deegan, ''[[Black-tie Python: Formal verification with Amaranth]]''
 
====On-going FOS silicon projects====
* Matthew Venn ([https://www.yosyshq.com/ YosysHQ], [https://www.chipflow.io/ ChipFlow]), ''[[TinyTapeout - what happened and next steps]]''
* Thomas Parry ([https://spherical-systems.com/ SPHERICAL]), ''[[Powered by Open EDA: Applying Apple's Chip-to-Product Design Methods to Satellites]]''
* Tim Edwards ([http://opencircuitdesign.com/ Open Circuit Design]), ''[[Open-frame version of the Caravel harness chip]]''
 
====IP blocks====
* Manuel Moser and Harald Pretl ([https://iic.jku.at/ Johannes Kepler University Linz]), ''[[Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology]]''
 
====Foundries and PDKs====
* Staf Verhaegen ([https://www.chips4makers.io/blog Chips4Makers]), ''[[Proof-of-concept for scalable analog blocks using the PDKMaster framework]]''
* Rene Scholz and Sergei Andreev ([https://www.ihp-microelectronics.com IHP Microelectronics]), ''[[Open source Design Flow status and roadmap for IHP BiCMOS technology]]''
 
====Transistor modelling and circuit simulation====
* Felix Salfelder ([https://savannah.gnu.org/git/?group=gnucap GnuCap]), ''[[Verilog-AMS in Gnucap]]''
 
====Back-end design tools====
* Gabriel Gouvine ([http://coriolis.lip6.fr/ Coriolis]), ''[[title to be announced]]''
* Dan Fritchman ([https://github.com/dan-fritchman/Layout21 Layout21]), ''[[Layout21 (tentative)]]''
* Christophe Alexandre ([https://github.com/xtofalex/naja Naja]), ''[[Naja: project updates and netlist splitting tool]]''
* Pavel Smirnov ([https://www.meetiqm.com/ IQM]), ''[[KQCircuits – open-source EDA software for designing chips with super conducting qubits]]''
* Jean-Paul Chaput ([https://www.lip6.fr/actualite/personnes-fiche.php?ident=P109 LIP6, Sorbonne Université]), ''[[Coriolis a RTL to GDSII FOSS Design Flow]]''
* Matthias Köfferlein ([https://www.klayout.de/ KLayout]), ''[[Learning from GF180 PDK: Best practices for implementing and optimizing KLayout DRC and LVS decks]]''
 
====Funding opportunities====
* Michiel Lenaars ([https://nlnet.nl/ NLnet Foundation]), ''[[An overview of libre silicon and OSHW related efforts within NGI and NLnet]]''
 
====Open-source standards and certifications====
* Martin Häuer ([https://ose-germany.de/ Open Source Ecology Germany e. V.]), ''[[Standardizing Open Source Hardware, meet DIN SPEC 3105 – What has been done, what comes next and why this is awesome]]''
 
====Teaching and education====
* Martin Schoeberl ([https://www.imm.dtu.dk/~masca/ DTU Compute]), ''[[Teaching Chip Design with Open-Source Tools]]''
 
====Sustainability====
* Maxime Pelcat ([https://www.ietr.fr/maxime-pelcat Univ Rennes, INSA Rennes]), ''[[Environmental impacts of electronics and the role of open source hardware]]''
* Amael Parreaux-Ey ([https://resilio-solutions.com/amael.parreaux-ey resilio]), ''[[How to foster GreenIT through open hardware?]]''
* David Bol ([https://perso.uclouvain.be/david.bol/index.html ICTEAM Institute, UC Louvain]), ''[[title to be announced]]''
* Julia Hess ([https://www.stiftung-nv.de/en/person/julia-hess Stiftung Neue Verantwortung]),  ''[[title to be announced]]''


== Donations ==
== Donations ==

Revision as of 15:22, 24 May 2023

Free Silicon Conference 2023
Fsic2023 logo.png
GenreFree software and free hardware development conference
Location(s)Paris, Sorbonne Université
CountryFrance
Websitewiki.f-si.org/index.php/FSiC2023


The 2023 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 10,11,12 2023 (Monday to Wednesday). This event will build on top of the past FSiC2019 and FSiC2022 editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification. After the daily talks, the discussion will continue until late in an informal and relaxed atmosphere.

News

February 16: submissions are open.

Objectives and motto

The goal of FSiC is to make the technology accessible to small businesses, startups, universities and schools. Students, makers and professional should have direct access to education, without barriers, paywalls and legal burdens. What's the value of multi-billion public investments if there aren't designers, engineers and other experts who can operate the industry and who master the tools to innovate? We all took apart watches and radios when we were kids, hence we learned how they work. It is time to look inside chips and their tool-chains so that we can study, improve, repair and trust them.

The conference motto is therefore: Education, sustainability and innovation by openness and collaboration!

Submission

For proposing a talk, please submit a title and a short summary at fsic2023 'at' f-si.org before May 31.

Participation

Participation to the conference is free of charge but the attendance must be reserved per email at fsic2023 'at' f-si.org. Details will be announced on this page and over the mastodon channel. The slides and the video recordings of the talks will be published on our website.

Organizing committee

Fsic2022 mml.png
Marie-Minerve Louerat
Scientist and Teacher
‟I have a passion for educating and teaching students, to give them tools for life and learning.”
Fsic2022 la.png
Luca Alloatti
Libre Hardware Promoter
‟Technology is political. I stand for defending free access to technology and the right for transparency.”
Fsic2022 tk.png
Thomas Kramer
Skeptical Technology Enthusiast
‟I like to understand technology, to adapt and enhance it. Technology should not be mythical or owned by experts only, it needs to be comprehensible.”
Fsic2022 mk.png
Matthias Köfferlein
FOSS EDA Author
‟I am passionate about helping people with my technical skills. Coding EDA is like gardening to me: may it grow and feed people.”

List of confirmed speakers

Keynote speech

High-level design and logic-synthesis

Hardware security

On-going FOS silicon projects

IP blocks

Foundries and PDKs

Transistor modelling and circuit simulation

Back-end design tools

Funding opportunities

Open-source standards and certifications

Teaching and education

Sustainability

Donations

We are looking for sponsors to cover extra services at the conference, such as food and beverages. In case of interest, please write at fsic2023 'at' f-si.org.

Academic Sponsors

SUS LIP6 CNRSnew.jpg Irill.png

Acknowledgements

This conference is funded by the EU HORIZON Coordination and Support Action GoIT project with ID number 101070669.

EU-co-funded.jpg GoIT.png