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Combined display of all available logs of F-Si wiki. You can narrow down the view by selecting a log type, the username (case-sensitive), or the affected page (also case-sensitive).
(newest | oldest) View (newer 20 | older 20) (20 | 50 | 100 | 250 | 500)- 13:38, 3 May 2024 AKrinke talk contribs created page Generating DRC Runsets for IHP's OpenPDK - Lessons Learned (Created page with "* Speaker: Andreas Krinke * email: andreas.krinke AT tu-dresden.de * website: https://www.ifte.de/english/staff/krinke.html ==Downloads== * Slides (...")
- 20:47, 2 May 2024 Charles.papon talk contribs created page Moving toward VexiiRiscv (Created page with "* Speaker: Charles Papon * email: charles.papon.90@gmail.com ==Downloads== * Slides (to upload a file: go to Edit mode, then click on the fourth ico...")
- 09:32, 2 May 2024 Jxj talk contribs created page An opensource Wi-Fi chip, What, Why and How? (Created page with "* Speaker(s): Xianjun Jiao * email: xianjun.jiao@imec.be * other information: ==Abstract== Openwifi project (https://github.com/open-sdr), as the 1st Linux compatible soft-m...")
- 09:25, 2 May 2024 User account Jxj talk contribs was created
- 22:29, 30 April 2024 TimEdwards talk contribs created page CACE: Defining an open-source analog and mixed-signal design flow (Added abstract and other information for the talk on the CACE tool)
- 22:19, 30 April 2024 TimEdwards talk contribs created page Caravel Panamax: The Next Generation (Added abstract and other information for the talk on the Caravel Panamax harness chip)
- 17:08, 24 April 2024 Rajit talk contribs created page The ACT EDA flow for asynchronous logic (Created page with " * Speaker(s): Rajit Manohar ==Abstract== ==Software== ===General information=== * Repository: https://github.com/asyncvlsi/actflow/ * Main documentation website: https:/...")
- 17:03, 24 April 2024 User account Rajit talk contribs was created
- 15:04, 24 April 2024 Luca Pezzarossa talk contribs created page From Theory to Tape-Out: Chip Design Education with Edu4Chip (Created page with "* Speaker: Luca Pezzarossa * Email: lpez@dtu.dk * Other information: [https://www2.compute.dtu.dk/~lpez/ Personal page] ==Downloads== * Slides (coming soon)...")
- 10:04, 24 April 2024 AKrinke talk contribs created page User:AKrinke (Created page with "I lead the electronic design automation group at the Institute of Electromechanical and Electronic Design, Dresden University of Technology in Germany. [https://www.ifte.de/e...")
- 09:48, 24 April 2024 User account AKrinke talk contribs was created
- 09:34, 24 April 2024 User account Rfscholz talk contribs was created
- 08:59, 24 April 2024 Felix talk contribs created page Verilog-AMS in Gnucap (2024) (initial page)
- 00:50, 24 April 2024 User account Luca Pezzarossa talk contribs was created
- 19:30, 23 April 2024 Dorian Bachelot talk contribs created page Degate: The stakes and challenges of silicon reverse engineering (Created page with "* Speaker(s): Dorian Bachelot * email: contact@dorianb.net * other information: https://dorianb.net ==Downloads== * Slides (Soon) ==Abstract== In...")
- 19:17, 23 April 2024 User account Dorian Bachelot talk contribs was created
- 09:06, 23 April 2024 Arpadb talk contribs created page VACASK: a Verilog-A Circuit Analysis Kernel (Created page with "* Speaker(s): Árpád Bűrmen (University of Ljubljana, Faculty of Electrical Engineering) * email: arpad.buermen [at] fe.uni-lj.si ==Downloads== * Slides (TODO) ==Abstract...")
- 09:04, 23 April 2024 Tempia talk contribs created page The EPFL Logic Synthesis Libraries: open-source tools for classical and emerging technologies (Created page with "* Speaker: Alessandro Tempia Calvino * email: alessandro.tempiacalvino[at]epfl.ch * website: https://aletempiac.github.io * Scholar: https://scholar.google.com/citations?user=...")
- 08:54, 23 April 2024 User account Tempia talk contribs was created
- 08:45, 23 April 2024 Arpadb talk contribs created page Verilog-A Circuit Analysis Kernel (VACASK) (Created page with "* Speaker(s): Árpád Bűrmen (University of Ljubljana, Faculty of Electrical Engineering) * email: arpad.buermen@fe.uni-lj.si ==Downloads== * Slides (TODO) ==Abstract== T...")