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- 15:42, 23 December 2019 diff hist +248 N F-Si Donations Created page with "The F-Si currently accepts donations only by bank transfer to the following account: <pre> Bank name: Alternative Bank Schweiz (ABS) Account holder: Free Silicon Foundation A..."
- 23:16, 15 December 2019 diff hist +337 FSiC2020
- 13:31, 15 December 2019 diff hist +140 Main Page →News
- 13:12, 15 December 2019 diff hist 0 File:Fsic2020 logo.svg Admin uploaded a new version of File:Fsic2020 logo.svg current
- 13:05, 15 December 2019 diff hist 0 N File:Fsic2020 logo.svg
- 13:05, 15 December 2019 diff hist +1,289 N FSiC2020 Created page with "{{Infobox recurring event |name = Free Silicon Conference 2020 |logo = fsic2020_logo.svg |genre = Free software and free hardware develop..."
- 17:34, 5 December 2019 diff hist 0 m F-Si Statute Protected "F-Si Statute" ([Edit=Allow only administrators] (indefinite) [Move=Allow only administrators] (indefinite))
- 01:06, 12 November 2019 diff hist −74 The Raven chip: First-time silicon success with qflow and efabless →Software current
- 18:11, 16 July 2019 diff hist +4 Hands-on with KLayout: Design rule checks and layout to netlist tools current
- 18:10, 16 July 2019 diff hist +93 Hands-on with KLayout: Design rule checks and layout to netlist tools →Slides
- 18:10, 16 July 2019 diff hist −38 The Alliance/Coriolis design flow →Roadmap current
- 18:09, 16 July 2019 diff hist −898 The Alliance/Coriolis design flow
- 18:08, 16 July 2019 diff hist −2 ABSYNTH: Analog Design Automation - An approach to bring VLSI analog design to the hobbyists/non-professionals current
- 18:07, 16 July 2019 diff hist +72 ABSYNTH: Analog Design Automation - An approach to bring VLSI analog design to the hobbyists/non-professionals
- 18:06, 16 July 2019 diff hist −31 From filters to CMOS transistors - A library of analog schematics with automated sizing →References current
- 18:06, 16 July 2019 diff hist +100 From filters to CMOS transistors - A library of analog schematics with automated sizing
- 18:05, 16 July 2019 diff hist +92 High level system modelling, hands-on computer session →Slides current
- 18:04, 16 July 2019 diff hist −11 Toward a collaborative environment for Open Hardware Design current
- 18:03, 16 July 2019 diff hist −16 Toward a collaborative environment for Open Hardware Design →References
- 18:03, 16 July 2019 diff hist −17 Toward a collaborative environment for Open Hardware Design →Slides
- 18:02, 16 July 2019 diff hist +78 CERN OHL v2 draft current
- 18:01, 16 July 2019 diff hist +90 CERN OHL v2 draft →Slides
- 18:00, 16 July 2019 diff hist +74 FSiC2019 →Back-end flow and algorithms
- 17:59, 16 July 2019 diff hist +36 The Raven chip: First-time silicon success with qflow and efabless →Slides
- 17:58, 16 July 2019 diff hist −15 Open Source Parasitic Extraction current
- 17:57, 16 July 2019 diff hist +33 CMOS functional abstraction current
- 17:57, 16 July 2019 diff hist +139 CMOS functional abstraction
- 17:55, 16 July 2019 diff hist +163 KLayout's deep verification base project →Abstract current
- 17:53, 16 July 2019 diff hist +97 KLayout's deep verification base project
- 17:52, 16 July 2019 diff hist 0 Placement algorithms for standard cells in Coriolis current
- 17:52, 16 July 2019 diff hist +111 Placement algorithms for standard cells in Coriolis
- 17:51, 16 July 2019 diff hist −31 FOS standard cell generator from scratch current
- 17:50, 16 July 2019 diff hist +102 FOS standard cell generator from scratch
- 17:48, 16 July 2019 diff hist −67 OpenRAM: An Open-Source Memory Compiler →General information current
- 17:48, 16 July 2019 diff hist +82 OpenRAM: An Open-Source Memory Compiler
- 17:47, 16 July 2019 diff hist +74 FSiC2019 →Foundries, PDKs and cell libraries
- 17:46, 16 July 2019 diff hist +1 The development of the NSXLIB standard cell scalable library current
- 17:46, 16 July 2019 diff hist +99 The development of the NSXLIB standard cell scalable library
- 17:45, 16 July 2019 diff hist +111 Converting 45nm transistor netlists to open standards current
- 17:44, 16 July 2019 diff hist +100 Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes current
- 17:43, 16 July 2019 diff hist −3 CMP add on services - Towards Foundry PDKs on Free CAD Tools current
- 17:43, 16 July 2019 diff hist −31 CMP add on services - Towards Foundry PDKs on Free CAD Tools
- 17:43, 16 July 2019 diff hist +262 CMP add on services - Towards Foundry PDKs on Free CAD Tools
- 17:40, 16 July 2019 diff hist +126 Lesson learned from Retro-uC and the search for the ideal EDA flow for open source silicon current
- 17:39, 16 July 2019 diff hist +137 ASICone. Goals, timeline, participants and tools current
- 17:37, 16 July 2019 diff hist +156 Open Source in Healthcare, an hardware approach: the echOpen project case current
- 17:36, 16 July 2019 diff hist +91 GnuCap: Progress and Opportunities current
- 17:35, 16 July 2019 diff hist +93 Gnu Circuit Analysis Package (GnuCap) current
- 17:34, 16 July 2019 diff hist 0 Ngspice - an open source mixed signal circuit simulator →Downloads current
- 17:34, 16 July 2019 diff hist 0 N File:Ngspice FSiC2019.pdf current