Long pages
Jump to navigation
Jump to search
Showing below up to 20 results in range #11 to #30.
View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)
- (hist) Recommendations for the EC on how to reduce the environmental impact of the ICT sector [7,632 bytes]
- (hist) F-Si Statute [6,687 bytes]
- (hist) Standard-cell synthesis [6,553 bytes]
- (hist) Recommendations and roadmap for the development of open-source silicon in the EU [5,411 bytes]
- (hist) FSiC2022 venue [4,571 bytes]
- (hist) Need for a free alternative to OpenAccess (by Matthias) [3,970 bytes]
- (hist) From filters to CMOS transistors - A library of analog schematics with automated sizing [3,892 bytes]
- (hist) Physical security for cryptographic implementations with open hardware [3,822 bytes]
- (hist) The importance of EU Academia in developing the chips of the future [3,552 bytes]
- (hist) Matthias:UnsortedThroughsOnFOSSForEDA [3,355 bytes]
- (hist) Merging Gnucap and Qucs -- The Why and How [3,157 bytes]
- (hist) SystemC AMS and upcoming free frameworks for the free design [2,967 bytes]
- (hist) High level Simulation [2,916 bytes]
- (hist) CMP add on services - Towards Foundry PDKs on Free CAD Tools [2,913 bytes]
- (hist) PyOpus - a Python library for design automation [2,859 bytes]
- (hist) FSiC2024 venue [2,736 bytes]
- (hist) FOS standard cell generator from scratch [2,671 bytes]
- (hist) FSiC2023 venue [2,632 bytes]
- (hist) Open-source electronic design automation for agile network defense at OVHcloud [2,555 bytes]
- (hist) Hands-on with KLayout: Design rule checks and layout to netlist tools [2,540 bytes]