Difference between revisions of "Wishbone: a free SoC bus family"
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Revision as of 23:08, 6 July 2022
- Speaker(s): Tristan Gingold
- email: tgingold@free.fr
Downloads
- File:Wishbone-fsic2022.pdf
- [https:peertube.f-si.org/xxxx Video recording]
Abstract
This is a talk about the Wishbone SoC bus, its history, its nice features and its drawbacks.
I will briefly present the classic wishbone protocol and a few mistakes to avoid. After the talk, you should be able to write cores that use wishbone but also you'd like to contribute to the specification!
Software
General information
- Repository: https://github.com/fossi-foundation/wishbone
- Main documentation website: https://cdn.opencores.org/downloads/wbspec_b3.pdf
- Wikipedia page: https://en.wikipedia.org/wiki/Wishbone_(computer_bus)