SystemC AMS and upcoming free frameworks for the free design
Revision as of 16:19, 11 March 2019 by Christoph.grimm (talk | contribs)
This talk will introduce SystemC and in particular its AMS extensions. SystemC is a free discrete event simulator for hardware/software systems. SystemC AMS introduces various models of computation, including timed data-flow. This permits the modelling of signal processing systems, but as well of analog/mixed-signal systems at a high level of abstraction. We will show how to use SystemC (AMS, TLM) in a hierarchical design and verification flow. We show its integration with circuit level simulation at one hand. At the other hand, we will show integration with system level development processes.