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Showing below up to 20 results in range #121 to #140.
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- (hist) GAUT [664 bytes]
- (hist) From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD [649 bytes]
- (hist) Coriolis a RTL to GDSII FOSS Design Flow [639 bytes]
- (hist) The open-source and low-cost echo-stethoscope project [616 bytes]
- (hist) LibrEDA [598 bytes]
- (hist) How to foster GreenIT through open hardware? [595 bytes]
- (hist) Placement algorithms for standard cells in Coriolis [559 bytes]
- (hist) Libre Silicon Compiler [552 bytes]
- (hist) Synthesis with ghdl [492 bytes]
- (hist) FSiC2019 reimbursement [471 bytes]
- (hist) An overview of libre silicon and OSHW related efforts within NGI and NLnet [439 bytes]
- (hist) GnuCap: Progress and Opportunities [428 bytes]
- (hist) Welcome from the Free Silicon Foundation 2023 [417 bytes]
- (hist) FSiC2020 [405 bytes]
- (hist) Ngspice - an open source mixed signal circuit simulator [403 bytes]
- (hist) The ACT EDA flow for asynchronous logic [344 bytes]
- (hist) Welcome from LIP6 [333 bytes]
- (hist) Main Page/Software [307 bytes]
- (hist) Introduction to the GoIT project [292 bytes]
- (hist) F-Si Donations [273 bytes]