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- 17:37, 16 July 2019 diff hist +156 Open Source in Healthcare, an hardware approach: the echOpen project case current
- 17:36, 16 July 2019 diff hist +91 GnuCap: Progress and Opportunities current
- 17:35, 16 July 2019 diff hist +93 Gnu Circuit Analysis Package (GnuCap) current
- 17:34, 16 July 2019 diff hist 0 Ngspice - an open source mixed signal circuit simulator →Downloads current
- 17:34, 16 July 2019 diff hist 0 N File:Ngspice FSiC2019.pdf current
- 17:31, 16 July 2019 diff hist −28 Ngspice - an open source mixed signal circuit simulator
- 17:30, 16 July 2019 diff hist −36 Mixed-signal system modelling and simulation →Downloads current
- 17:29, 16 July 2019 diff hist +109 Mixed-signal system modelling and simulation
- 17:28, 16 July 2019 diff hist +7 SystemC AMS and upcoming free frameworks for the free design →Downloads current
- 17:28, 16 July 2019 diff hist +66 SystemC AMS and upcoming free frameworks for the free design
- 17:25, 16 July 2019 diff hist 0 N File:LiteX FSiC2019.pdf current
- 17:25, 16 July 2019 diff hist +178 N LiteX: an open-source SoC builder and library based on Migen Python DSL Created page with "* Speaker: Florent Kermarrec ==Downloads== * Slides * [https://peertube.f-si.org/videos/watch/82509fba-c73e-4c00-92ff-d89e9eb913f2 Video recording]" current
- 17:23, 16 July 2019 diff hist +39 Guidelines for speakers →Slides
- 17:21, 16 July 2019 diff hist −99 FSiC2019 →High-level digital design (session I)
- 17:19, 16 July 2019 diff hist +74 FSiC2019 →High-level digital design (session I)
- 17:18, 16 July 2019 diff hist +97 From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD current
- 17:17, 16 July 2019 diff hist +111 Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design current
- 17:15, 16 July 2019 diff hist +93 High level Simulation current
- 17:13, 16 July 2019 diff hist +79 GHDL and the economy of EDA FOSS current
- 17:11, 16 July 2019 diff hist +12 Towards digital sovereignty by open source (hardware) current