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An 8-Bit architecture based on lessons learned from the Small Device C Compiler and the architectures it supports

  • Speaker: Philipp K. Krause
  • Email: krauseph@informatik.uni-freiburg.de



While we have seen the rise of RISC-V among the architectures for "big" (32- and 64-bit) systems, for "small" systems (8/16-bit) the situation is unchanged. Most of them either use a proprietary architecture available from a single vendor only, or use an ancient architecture, such as MCS-51, that is not well suited to to current requirements.

Experience from supporting a variety of 8/16-bit architectures in the Small Device C Compiler (SDCC) led to the design of a new architecture for 8-bit microcontrollers (µC). The work is still in an early stage, but data obtained using an experimental port of SDCC shows the potential for substantial improvements in code density and speed over current architectures.