Verilog-AMS in Gnucap (2024)

• Speaker: Felix Salfelder
• email: felix AT salfelder DOT org

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• Slides (WIP)

Abstract

This talk will summarise our work with NLnet towards a modular and free/libre Verilog-AMS implementation based on Gnucap. Gnucap is a circuit simulator implemented as a small and stable C++ library without dependencies and a set of plugins providing close to arbitrary end user functionality.

Gnucap features an accurate and scalable transient mixed signal simulation algorithm. With modelgen, it has been on the forefront of free/libre semiconductor modelling since before Verilog-AMS has been defined. Verilog-AMS has now become a standard modelling language widely used for mixed signal modelling.

Gnucap supports the structural section of Verilog-AMS by means of a language plugin. This plugin provides reading and writing of Verilog-based netlists, schematics and layout. Since recently, modelgen-verilog adds support for the behavioural section of Verilog-AMS starting from the analog, now expanding towards the digital.

Software

General information

• Repository: main, mirror
• Examples: gnucap examples, modelgen examples
• Plugins: language support, simulator plugins, primitives, foreign models
• Tests: gnucap tests, modelgen tests
• Projects: NLnet'23, Nlnet'24, yours?

Roadmap for 2024

• Annex C: Analog language subset (aka. "Verilog-A")
• Add some digital to modelgen-verilog
• Handle large mixed circuits
• Interoperability