View source for The development of the NSXLIB standard cell scalable library

* Speaker: Pr. Naohiko Shimizu
* email: Naohiko Shimizu <nshimizu@tokai.ac.jp> 
* other information:

==Downloads==
* [https://peertube.f-si.org/videos/watch/07acece3-2950-4596-97b1-2c390980dd2c Video recording]

==Abstract==
I will talk on Development of nsxlib cell library.

It is compatible with Phenitec 0.6um, MOSIS DEEP (0.18um), FreePDK45 technology.
Also I'm planning it to adapt Phenitec 0.35um in near future.

The nsxlib is deeply modified version of sxlib of [https://www-soc.lip6.fr/equipe-cian/logiciels/tasyagle/ Alliance].
I changed defaul lambda unit interpretation and each cell design.
I introduced a new verification method for cell design.
The development and adaptation method to new technology will be presented.
The outline of the talk will be followings:

# Semi automatic modification of basic lambda from sxlib.
# DRC rules description
# Formal proof flow was established for this development with co-operation with Jean-Paul Chaput (LIP6).
## Extract spice net-list from layout with cougar ([https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/ Alliance] tool).
## Spice to VHDL behavior extraction with [https://www-soc.lip6.fr/equipe-cian/logiciels/tasyagle/ yagle] (ALliance related tool)
## Formal proof with proof (Alliance tool)
# Adaptation trial to FreePDK45

It passed FreePDK45 DRC with my druc rule set.
I will make more concrete DRC rule set soon.
(Wide metal rules are a little difficult to describe)

==Software==
===General information===
* Repository: on-going work
* Main documentation website: on-going
* The software has been used in the following projects: MakeLSI:Project, [https://www.minimalfab.com/ MinimalFab]

===Roadmap===
* The software wishes to interface with the following tools: [https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/ Alliance], [https://www-soc.lip6.fr/equipe-cian/logiciels/coriolis/ Coriolis], [https://www-soc.lip6.fr/equipe-cian/logiciels/oceane/ Oceane]
* The project seeks help on: English translation of Oceane documentation, English rule description within Alliance

==References==
* J.Akita,“OpenSourceLSIdesign&FabricationProjectforDistributed IP Development,” in International Conference on Analog VLSI Circuits, (AVIC), 2016.
* N. Shimizu, J. Akita, M.‑M. Louërat, Haralampos‑G. Stratigopoulos, J.‑P. Chaput, D. Galayko : “Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping”, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, (IEEE) (2018)
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