Difference between revisions of "SystemC AMS and upcoming free frameworks for the free design"

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This talk will introduce SystemC and in particular its AMS extensions.
* Speaker: Christoph Grimm, TU Kaiserslautern
SystemC is a free discrete event simulator for hardware/software systems.
* Contact: grimm@cs.uni-kl.de
SystemC AMS introduces various models of computation, including timed data-flow.  
 
This permits the modelling of signal processing systems, but as well of analog/mixed-signal systems at a high level of abstraction.
==Downloads==
We will show how to use SystemC (AMS, TLM) in a hierarchical design and verification flow.
* [[:File:F-Si2019-Grimm.pdf|Slides]]
We show its integration  with circuit level simulation at one hand.
* [https://peertube.f-si.org/videos/watch/c0abc583-880e-48da-b5e8-066130574287 Video recording]
At the other hand, we will show integration with system level development processes.
 
== Abstract ==
The development of HW/SW/AMS systems demands for very powerful means for verification.
The particular challenge is to bring circuit level effects to the system level, and to show that the non-idealities have no relevant impact on the system performances.  
 
Indeed, this challenge can be mastered perfectly with free tools:
* SystemC, a free discrete event simulator for hardware/software systems.
* SystemC AMS, an extension that introduces various models of computation, including timed data-flow.
* AADDlib and AADDsim that provide means for symbolic simulation to SystemC and SystemC AMS.
Together with circuit level tools, e.g. [http://gnucap.org gnucap] or [http://ngspice.sourceforge.net ngspice], these tools cover design of signal processing and analog/mixed-signal systems.
 
The presentation will show how to use SystemC (AMS, TLM) in a hierarchical design and verification flow.
The flow links circuit level simulation and system level simulation via the characterization of ''properties''.
For characterization, we use Affine Forms of AADDlib that represent nominal value, dependencies, and guarantee safe inclusions.
The properties are then used at a system level simulation with SystemC AMS.
The hierarchical verification flow is supported by the AADDlib that allows the symbolic simulation of SystemC and SystemC AMS.
 
== Software ==
* SystemC is available for download under https://accellera.org/downloads/standards/systemc
* SystemC AMS is available for download under https://www.coseda-tech.com/systemc-ams-proof-of-concept
* AADDlib/AADDsim are available under https://github.com/TUK-CPS/AADD
* [http://gnucap.org gnucap] or [http://ngspice.sourceforge.net ngspice]
 
== References ==
F. Pecheux, C. Grimm, T. Maehne, M. Barnasconi, and K. Einwich, “SystemC AMS based frameworks for virtual prototyping of heterogeneous systems,” in 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, pp. 1–4. doi: 10.1109/ISCAS.2018.8351864. [Online]. Available: https://ieeexplore.ieee.org/document/8351864/.
 
C. Grimm and M. Rathmair, “Dealing with uncertainties in analog/mixed-signal systems: Invited,” in Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017, 2017, 35:1–35:6. doi: 10.1145/3061639.3072949. [Online]. Available: http://doi.acm.org/10.1145/3061639.3072949.
 
C. Zivkovic, C. Grimm, M. Olbrich, O. Scharf, and E. Barke, “Hierarchical verification of AMS systems with affine arithmetic decision diagrams.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1–1, 2018, issn: 0278-0070. doi: 10.1109/TCAD.2018.2864238. (online: https://ieeexplore.ieee.org/document/8428606)

Latest revision as of 16:28, 16 July 2019

  • Speaker: Christoph Grimm, TU Kaiserslautern
  • Contact: grimm@cs.uni-kl.de

Downloads

Abstract

The development of HW/SW/AMS systems demands for very powerful means for verification. The particular challenge is to bring circuit level effects to the system level, and to show that the non-idealities have no relevant impact on the system performances.

Indeed, this challenge can be mastered perfectly with free tools:

  • SystemC, a free discrete event simulator for hardware/software systems.
  • SystemC AMS, an extension that introduces various models of computation, including timed data-flow.
  • AADDlib and AADDsim that provide means for symbolic simulation to SystemC and SystemC AMS.

Together with circuit level tools, e.g. gnucap or ngspice, these tools cover design of signal processing and analog/mixed-signal systems.

The presentation will show how to use SystemC (AMS, TLM) in a hierarchical design and verification flow. The flow links circuit level simulation and system level simulation via the characterization of properties. For characterization, we use Affine Forms of AADDlib that represent nominal value, dependencies, and guarantee safe inclusions. The properties are then used at a system level simulation with SystemC AMS. The hierarchical verification flow is supported by the AADDlib that allows the symbolic simulation of SystemC and SystemC AMS.

Software

References

F. Pecheux, C. Grimm, T. Maehne, M. Barnasconi, and K. Einwich, “SystemC AMS based frameworks for virtual prototyping of heterogeneous systems,” in 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, pp. 1–4. doi: 10.1109/ISCAS.2018.8351864. [Online]. Available: https://ieeexplore.ieee.org/document/8351864/.

C. Grimm and M. Rathmair, “Dealing with uncertainties in analog/mixed-signal systems: Invited,” in Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017, 2017, 35:1–35:6. doi: 10.1145/3061639.3072949. [Online]. Available: http://doi.acm.org/10.1145/3061639.3072949.

C. Zivkovic, C. Grimm, M. Olbrich, O. Scharf, and E. Barke, “Hierarchical verification of AMS systems with affine arithmetic decision diagrams.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1–1, 2018, issn: 0278-0070. doi: 10.1109/TCAD.2018.2864238. (online: https://ieeexplore.ieee.org/document/8428606)