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Showing below up to 20 results in range #21 to #40.
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- (hist) Merging Gnucap and Qucs -- The Why and How [3,157 bytes]
- (hist) SystemC AMS and upcoming free frameworks for the free design [2,967 bytes]
- (hist) High level Simulation [2,916 bytes]
- (hist) CMP add on services - Towards Foundry PDKs on Free CAD Tools [2,913 bytes]
- (hist) FOS standard cell generator from scratch [2,671 bytes]
- (hist) FSiC2023 venue [2,632 bytes]
- (hist) Open-source electronic design automation for agile network defense at OVHcloud [2,555 bytes]
- (hist) Hands-on with KLayout: Design rule checks and layout to netlist tools [2,540 bytes]
- (hist) The development of the NSXLIB standard cell scalable library [2,529 bytes]
- (hist) KLayout XSection tool - Deep insights or nonsense in colors? [2,351 bytes]
- (hist) Guidelines for invited speakers [2,237 bytes]
- (hist) Coriolis (installation) [2,232 bytes]
- (hist) Horizon 2021 Coordination and Support Action (CSA) proposal [2,186 bytes]
- (hist) Proof-of-concept for scalable analog blocks using the PDKMaster framework [2,164 bytes]
- (hist) KQCircuits – open-source EDA software for designing chips with super conducting qubits [2,158 bytes]
- (hist) Inclusive Modeling with SysMD [2,143 bytes]
- (hist) Mediawiki template for invited speakers [2,082 bytes]
- (hist) Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design [2,058 bytes]
- (hist) Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes [2,043 bytes]
- (hist) FSiC2019 venue [1,982 bytes]