Pages with the fewest revisions

Showing below up to 20 results in range #21 to #40.

View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)

21. Analyzing open-source chip design ecosystem from an environmental sustainability perspective‏‎ (2 revisions)
22. FSiC2019 reimbursement‏‎ (2 revisions)
23. TestPageX‏‎ (2 revisions)
24. Synthesis with ghdl‏‎ (2 revisions)
25. A progressive introduction to memory bus interconnect API in Software-Defined Hardware‏‎ (2 revisions)
26. Standard Cell Library report‏‎ (2 revisions)
27. From CMOS transistors to filters - A library of analog schematics with automated sizing‏‎ (2 revisions)
28. LibrEDA‏‎ (3 revisions)
29. How many designs can you fit on a single die‏‎ (3 revisions)
30. Naja: an open source framework for EDA post synthesis flow development‏‎ (3 revisions)
31. Composing an out-of-order CPU using software technics‏‎ (3 revisions)
32. F-Si Statute‏‎ (3 revisions)
33. Open-source electronic design automation for agile network defense at OVHcloud‏‎ (3 revisions)
34. Recommendations for the EC on how to reduce the environmental impact of the ICT sector‏‎ (3 revisions)
35. Ngspice - an open source mixed signal circuit simulator‏‎ (3 revisions)
36. XSCHEM - circuit schematic editor for VLSI, ASIC, PCB design‏‎ (3 revisions)
37. ASICone. Goals, timeline, participants and tools‏‎ (3 revisions)
38. GnuCap: Progress and Opportunities‏‎ (3 revisions)
39. An overview of libre silicon and OSHW related efforts within NGI and NLnet‏‎ (3 revisions)
40. OpenSource PDK - A key enabler to unlock the potential of an open source design flow‏‎ (3 revisions)

View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)