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  1. ABSYNTH: Analog Design Automation - An approach to bring VLSI analog design to the hobbyists/non-professionals
  2. A Yosys plugin for logic locking
  3. A progressive introduction to memory bus interconnect API in Software-Defined Hardware
  4. Accelerating the Open Source Silicon Ecosystem with Jupyter Notebooks
  5. All you ever wanted to know about side-channel attacks and protections (and a forthcoming book)
  6. An overview of libre silicon and OSHW related efforts within NGI and NLnet
  7. Black-tie Python: Formal verification with Amaranth
  8. CERN Open Hardware License (OHL)
  9. CIAN Team Welcome
  10. CMOS functional abstraction
  11. Closing The Synthesis Gap — Is Open Source Logic Synthesis About To Beat The Industry?
  12. Composing an out-of-order CPU using software technics
  13. Converting 45nm transistor netlists to open standards
  14. Coriolis (installation)
  15. Coriolis (tutorials)
  16. Coriolis a RTL to GDSII FOSS Design Flow
  17. Degate: The stakes and challenges of silicon reverse engineering
  18. E-Waste Reverse Engineering Toolkit (RET)
  19. F-Si Donations
  20. F-Si Statute
  21. FSiC2019 reimbursement
  22. FSiC2019 venue
  23. FSiC2020
  24. FSiC2021
  25. FSiC2022 venue
  26. FSiC2023 venue
  27. FSiC2024 venue
  28. From CMOS transistors to filters - A library of analog schematics with automated sizing
  29. From Theory to Tape-Out: Chip Design Education with Edu4Chip
  30. GAUT
  31. Guidelines for speakers
  32. Horizon 2021 Coordination and Support Action (CSA) proposal
  33. How to foster GreenIT through open hardware?
  34. LIP6 Welcome
  35. Learning hardware design in the video game Minecraft
  36. Libre Silicon Compiler
  37. Matthias:UnsortedThroughsOnFOSSForEDA
  38. Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design
  39. Need for a free alternative to OpenAccess (by Matthias)
  40. Open-source electronic design automation for agile network defense at OVHcloud
  41. OpenROAD
  42. Open (and Closed) Source Analog Design with Hdl21 & VLSIR
  43. Open Source for Sustainable and Long lasting Phones
  44. Open Source in Healthcare, an hardware approach: the echOpen project case
  45. Open source Design Flow status and roadmap for IHP BiCMOS technology
  46. PDKMaster & co.: a framework for scalable and technology portable standard cell, IO and SRAM libraries
  47. Powered by Open EDA: Applying Apple's Chip-to-Product Design Methods to Satellites
  48. Proof-of-concept for scalable analog blocks using the PDKMaster framework
  49. Recommendations and roadmap for the development of open-source silicon in the EU
  50. Recommendations for the EC on how to reduce the environmental impact of the ICT sector

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