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Showing below up to 86 results in range #51 to #136.

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  1. Standard-cell characterization‏‎ (17:36, 21 May 2021)
  2. F-Si Statute‏‎ (22:50, 22 December 2021)
  3. FSiC2021‏‎ (11:27, 7 February 2022)
  4. FSiC2020‏‎ (11:28, 7 February 2022)
  5. KiCad‏‎ (14:58, 10 March 2022)
  6. Horizon 2021 Coordination and Support Action (CSA) proposal‏‎ (11:05, 17 June 2022)
  7. F-Si Donations‏‎ (08:41, 23 June 2022)
  8. FSiC2022 venue‏‎ (12:46, 6 July 2022)
  9. XSCHEM - circuit schematic editor for VLSI, ASIC, PCB design‏‎ (11:22, 12 July 2022)
  10. Composing an out-of-order CPU using software technics‏‎ (21:26, 1 August 2022)
  11. Inclusive Modeling with SysMD‏‎ (21:29, 1 August 2022)
  12. Wishbone: a free SoC bus family‏‎ (21:29, 1 August 2022)
  13. Porting software to hardware using XLS and open source PDKs‏‎ (21:31, 1 August 2022)
  14. Synthesis with ghdl‏‎ (21:32, 1 August 2022)
  15. How many designs can you fit on a single die‏‎ (21:33, 1 August 2022)
  16. Standard Cell Library report‏‎ (21:34, 1 August 2022)
  17. Go2async: A high-level synthesis tool for asynchronous circuits‏‎ (21:36, 1 August 2022)
  18. KLayout XSection tool - Deep insights or nonsense in colors?‏‎ (21:37, 1 August 2022)
  19. OpenSource PDK - A key enabler to unlock the potential of an open source design flow‏‎ (21:38, 1 August 2022)
  20. PDKMaster & co.: a framework for scalable and technology portable standard cell, IO and SRAM libraries‏‎ (21:40, 1 August 2022)
  21. Challenge to Fabricate LSI without NDA with Open Method‏‎ (21:42, 1 August 2022)
  22. F8‏‎ (21:47, 1 August 2022)
  23. OpenEPDA: photonic PDKs with open standards‏‎ (21:56, 1 August 2022)
  24. Merging Gnucap and Qucs -- The Why and How‏‎ (21:59, 1 August 2022)
  25. Whom do you trust?: Validating process parameters for open-source tools‏‎ (22:00, 1 August 2022)
  26. LibrEDA - digital place-and-route framework from scratch‏‎ (22:00, 1 August 2022)
  27. Digital placement algorithms in Coriolis‏‎ (22:01, 1 August 2022)
  28. Naja: an open source framework for EDA post synthesis flow development‏‎ (22:02, 1 August 2022)
  29. Tutorial and FAQ on physical verification, DRC+LVS‏‎ (22:05, 1 August 2022)
  30. 65nm CMOS Design-Flows on Free and Open-Source Tools : An Overview‏‎ (10:16, 23 August 2022)
  31. Wiki/openic‏‎ (03:02, 4 September 2022)
  32. LibreCell‏‎ (23:34, 15 December 2022)
  33. Standard-cell synthesis‏‎ (14:48, 2 February 2023)
  34. Guidelines for invited speakers‏‎ (16:08, 9 June 2023)
  35. FSiC2023 venue‏‎ (14:12, 2 July 2023)
  36. TestPageX‏‎ (13:14, 8 July 2023)
  37. Mediawiki template for invited speakers‏‎ (17:46, 9 July 2023)
  38. Naja: project updates and netlist splitting tool‏‎ (21:32, 9 July 2023)
  39. E-Waste Reverse Engineering Toolkit (RET)‏‎ (23:05, 10 July 2023)
  40. Software-Defined Hardware: Digital Design in the 21st Century with Chisel‏‎ (21:13, 28 July 2023)
  41. A progressive introduction to memory bus interconnect API in Software-Defined Hardware‏‎ (21:14, 28 July 2023)
  42. Mixing software abstractions for high-level FPGA programming‏‎ (21:14, 28 July 2023)
  43. Toward multi-language open-source HDL simulation‏‎ (21:15, 28 July 2023)
  44. Recent Developments from YosysHQ‏‎ (21:15, 28 July 2023)
  45. Closing The Synthesis Gap — Is Open Source Logic Synthesis About To Beat The Industry?‏‎ (21:16, 28 July 2023)
  46. Industry-Grade SystemVerilog IPs And The Open Flow: How We Synthesized Iguana‏‎ (21:16, 28 July 2023)
  47. Proof-of-concept for scalable analog blocks using the PDKMaster framework‏‎ (21:16, 28 July 2023)
  48. Open source Design Flow status and roadmap for IHP BiCMOS technology‏‎ (21:17, 28 July 2023)
  49. TinyTapeout - what happened and next steps‏‎ (21:18, 28 July 2023)
  50. Powered by Open EDA: Applying Apple's Chip-to-Product Design Methods to Satellites‏‎ (21:18, 28 July 2023)
  51. Analyzing open-source chip design ecosystem from an environmental sustainability perspective‏‎ (21:19, 28 July 2023)
  52. Open Source for Sustainable and Long lasting Phones‏‎ (21:19, 28 July 2023)
  53. Open-source electronic design automation for agile network defense at OVHcloud‏‎ (21:20, 28 July 2023)
  54. Physical security for cryptographic implementations with open hardware‏‎ (21:20, 28 July 2023)
  55. Black-tie Python: Formal verification with Amaranth‏‎ (21:21, 28 July 2023)
  56. Exploring open hardware solutions for ensuring the security of RISC-V processors‏‎ (21:21, 28 July 2023)
  57. A Yosys plugin for logic locking‏‎ (21:22, 28 July 2023)
  58. All you ever wanted to know about side-channel attacks and protections (and a forthcoming book)‏‎ (21:22, 28 July 2023)
  59. Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology‏‎ (21:22, 28 July 2023)
  60. Verilog-AMS in Gnucap‏‎ (21:23, 28 July 2023)
  61. How to foster GreenIT through open hardware?‏‎ (21:24, 28 July 2023)
  62. The importance of EU Academia in developing the chips of the future‏‎ (21:25, 28 July 2023)
  63. Open (and Closed) Source Analog Design with Hdl21 & VLSIR‏‎ (21:26, 28 July 2023)
  64. An overview of libre silicon and OSHW related efforts within NGI and NLnet‏‎ (21:27, 28 July 2023)
  65. KQCircuits – open-source EDA software for designing chips with super conducting qubits‏‎ (21:28, 28 July 2023)
  66. Coriolis a RTL to GDSII FOSS Design Flow‏‎ (21:28, 28 July 2023)
  67. Learning from GF180 PDK: Best practices for implementing and optimizing KLayout DRC and LVS decks‏‎ (21:29, 28 July 2023)
  68. Teaching Chip Design with Open-Source Tools‏‎ (21:29, 28 July 2023)
  69. Learning hardware design in the video game Minecraft‏‎ (21:29, 28 July 2023)
  70. Accelerating the Open Source Silicon Ecosystem with Jupyter Notebooks‏‎ (21:29, 28 July 2023)
  71. OpenROAD‏‎ (11:09, 11 August 2023)
  72. The road to fully open hardware mobile computing‏‎ (14:08, 24 August 2023)
  73. Introduction to the GoIT project‏‎ (14:11, 24 August 2023)
  74. Welcome from LIP6‏‎ (15:23, 24 August 2023)
  75. Welcome from the Free Silicon Foundation 2023‏‎ (15:24, 24 August 2023)
  76. Recommendations for the EC on how to reduce the environmental impact of the ICT sector‏‎ (21:10, 30 September 2023)
  77. FSiC2023‏‎ (16:08, 1 October 2023)
  78. FSiC2022‏‎ (16:09, 1 October 2023)
  79. FSiC2019‏‎ (16:09, 1 October 2023)
  80. Environmental impacts of electronics and the role of open source hardware‏‎ (15:34, 20 October 2023)
  81. Recommendations and roadmap for the development of open-source silicon in the EU‏‎ (18:13, 3 November 2023)
  82. Main Page‏‎ (16:24, 25 January 2024)
  83. Free Silicon Foundation‏‎ (13:57, 31 January 2024)
  84. Gdsfactory‏‎ (10:21, 6 March 2024)
  85. FSiC2024‏‎ (08:53, 21 March 2024)
  86. Statute of the Free Silicon Foundation (I) ETS‏‎ (16:47, 28 March 2024)

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