OpenASIP: Co-processor co-design using open source tooling

• Speaker: Joonas Multanen
• email: joonas.multanen@tuni.fi

Downloads

• Slides (to upload a file: go to Edit mode, then click on the fourth icon from the left "Images and media" and follow the instructions). The slides can be uploaded also shortly before the conference and they can be modified until the talk.

Abstract

OpenASIP is an open source co-processor customization toolset developed since early 2000s by Tampere University, Finland and its various collaborators. OpenASIP provides a full application-specific instruction-set (ASIP) design and programming flow which includes an automatically retargeting LLVM-based compiler, an instruction-set simulator and an RTL generator. In the recent years, OpenASIP has received support for co-design of RISC-V based ASIPs.

Over the years, OpenASIP been used to design various ASIPs spanning from academic ultra low power to commercial-quality multicore SIMD-processors. Most of these have been academic case studies, but the authors are aware of commercial designs produced using the tooling.

Software

General information

• Repository: https://github.com/cpc/openasip
• Main documentation website: https://github.com/cpc/openasip/blob/main/openasip/manual/OpenASIP_manual.pdf