View source for Libretto: An open-source library characterizer for open-source VLSI design

Speaker: Shinichi Nishizawa

email: nishizawa@hiroshima-u.ac.jp

Recently, free and open-sourced silicon design communities are attracted by hobby designers, academies and industries. These open-source silicon designs are supported by free and open-source EDAs. To implement customized standard cell library in digital implementation flow, designer need to implement its logic function, timing and power information in digital implementation flow. We propose open-source characterizer to enable customized standard cell library for digital implementation. Proposed characterizer automates the extraction process of timing and power information by spice simulation, accumlates the simulators outputs and generates timing library as industial standard Liberty format. Current version supports several logic cells and sequential cells with different set and reset options. Multithread simulation is supported and it achieves 14.5x speed up in 32-core system.

== Slide ==
[[:File:FSiC2025_nishizawa.pdf ]]

== Link ==
* Repository: https://github.com/snishizawa/libretto
* [https://globals.ieice.org/en_transactions/fundamentals/10.1587/transfun.2022VLP0007/_p S. Nishizawa and T. Nakura, “libretto: An open cell timing charac- terizer for open source VLSI design,” IEICE Trans. Fund., vol.E106-A, no.3, pp.551–559, March 2023.] 
* [https://globals.ieice.org/en%20transactions/fundamentals/10.1587/transfun.2024VLL0001/%20f S. Nishizawa, M. Matsuda, and S. Kimura, “Multithread Implementation of Open Source Library Characterizer,” IEICE Trans. Fund., vol.E108.A, no.3, pp.525–528, 2025.]