Difference between revisions of "LibreCell"

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| operating system = Linux
| operating system = Linux
| genre = Electronic Design Automation (EDA)
| genre = Electronic Design Automation (EDA)
| license = AGPLv3 / [[CERN Open Hardware License (OHL)|CERN OHL-S v2]]
| license = AGPLv3 / [https://en.wikipedia.org/wiki/CERN_Open_Hardware_Licence CERN OHL-S v2]
| website = https://codeberg.org/tok/librecell
| website = https://codeberg.org/tok/librecell
}}
}}


LibreCell is a toolbox for automated CMOS standard-cell synthesis. Its main focus lies on automated layout generation and timing characterization.
LibreCell is a toolbox for automated CMOS [[Standard-cell synthesis|standard-cell synthesis]]. It's mainly focused on automated layout generation and [[Standard-cell characterization|timing characterization]]. The goal of the project is to generate a full standard-cell library based on abstract descriptions of the cells (e.g. netlists) and design rules of the target technology.

Revision as of 12:25, 18 March 2019

LibreCell
Original author(s)Thomas Kramer
Repositoryhttps://codeberg.org/tok/librecell
Written inPython
Operating systemLinux
TypeElectronic Design Automation (EDA)
LicenseAGPLv3 / CERN OHL-S v2
Websitehttps://codeberg.org/tok/librecell

LibreCell is a toolbox for automated CMOS standard-cell synthesis. It's mainly focused on automated layout generation and timing characterization. The goal of the project is to generate a full standard-cell library based on abstract descriptions of the cells (e.g. netlists) and design rules of the target technology.