High level Simulation

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Simulation at levels higher than RTL has been around for about 25 years now, and ad-hoc internally developed solutions, even though still quite in used, are gently being replaced by more opened, system level simulation environments. In this talk I will introduce system level simulation techniques, and give some details on two open-source digital system level environments: SoClib, a relatively confidential initiative targeting close to RTL descriptions, and QEMU, the very well known "processor emulator" (which is indeed a simulator).


Disclaimer: Please note that I am not among the authors of these programs, and present them only because they are useful to my research and believe it could be useful to others.


General information

  • Repository: https://www.soclib.fr/svn/trunk/soclib
  • Main documentation website: https://www.soclib.fr/
  • Wikipedia page: None (yet!)
  • Wiki page on wiki.f-si.org: None (yet!) either
  • The software has been used in the following projects: SoClib, TSAR
  • The software has been extensively used to teach classes at the hardware/software interface


  • The software wishes to interface with the following tools: GHDL? GTKWave? QEMU?
  • The project seeks help on:
    • general project architecture and cleanup
    • ISS support (through QEMU? or conversely)
    • Testing infrastructure
    • And ideas to speed-up simulation
      • Predecode in caches
      • Parallel simulation
      • ...
    • New platforms
    • New IPs


Papers by various authors of the SoClib environment


General information


  • On the hands on the QEMU community!
  • But what could be useful to us:
    • instrumentation infrastructure (many proposals, none made it to mainline yet)
    • clean way to encapsulate a CPU


Fabrice Bellard. QEMU, a fast and portable dynamic translator. Proceedings of the USENIX Annual Technical Conference, 2005.