Difference between revisions of "From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD"

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* email: charles.papon.90@gmail.com
* email: charles.papon.90@gmail.com


==Slides==
==Downloads==
[[File:Fsic2019 SpinalHDL.pdf|thumb|slides]]
* [[:File:Fsic2019 SpinalHDL.pdf |Slides]]
* [https://peertube.f-si.org/videos/watch/ac64a756-ad3b-48a1-91c9-8cdf08b0cda4 Video recording]


==Abstract==
==Abstract==

Latest revision as of 16:18, 16 July 2019

  • Speaker(s): Charles Papon
  • email: charles.papon.90@gmail.com

Downloads

Abstract

This talk will fly around different aspects of designing the netlist of a low-tech SoC, by exposing the practical case of VexRiscv the related technologies and challenges.

General information

Roadmap

  • The project seeks help on: Exploring new hardware description methodologies