FSiC2025
Free Silicon Conference 2025 | |
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Genre | Free software and free hardware development conference |
Location(s) | IHP Microelectronics, Frankfurt an der Oder |
Country | Germany |
Website | wiki.f-si.org/index.php/FSiC2025 |
The 2025 Free Silicon Conference (FSiC) will take place at IHP Microelectronics (Frankfurt an der Oder) on July 2, 3, 4 2025 (Wednesday to Friday). This event will build on top of the past FSiC editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification.
Submission
This is your opportunity to present your project and to get in touch with the community. For proposing a talk, please submit a title and a short summary at fsic2025 'at' f-si.org by May 1st (third submission phase). Topics are not restricted to the tentative program.
Participation
To participate to the conference, both as speaker and as attendee, it is necessary to register here.
From this year we have introduced a ticket:
- for non-profit, enthusiasts, free-time contributors: free admission
- for affiliated students: early bird 160 €, regular 200 €
- for professionals: early bird 340 €, regular 400 €
Early bird registration ends on May 16. Registrations close on June 16.
Tentative program
Welcome
- Gerhard Kahmen (Scientific director at IHP Microelectronics), Welcome and introduction of IHP
Digital design and logic-synthesis
- Matthias Jung (University of Würzburg), DRAM simulation with the simulator DRAMSys
- Edward Bingham (Broccolimicro), The potential for asynchronous circuits to bridge the hardware / software divide
- Marcel Walter (TU Munich), aigverse: Toward machine learning-driven logic synthesis
- Tjark Petersen (DTU), Towards open-source functional verification methodologies
- Andreas Krall (TU Wien), OpenVADL: An open source implementation of the Vienna architecture description language
- Kari Hepola and/or Joonas Multanen (Tampere University of Applied Sciences), Kactus2 (title to be announced)
Foundries and PDKs
- Jun-Ichi Okamura (AIST Solutions), 5W1H: Open-source PDK from the perspective of Japanese foundries aka -other side of the moon-
- Sergei Andreev (IHP Microelectronics), IHP Open PDK: development status updates and looking ahead
- Dietmar Warning (IHP Microelectronics), Verilog-A models in IHP OpenPDK for a modern SiGe RF process
On-going FOS silicon projects
- Leo Moser (formerly Efabless), Greyhound: A RISC-V SoC with tightly coupled eFPGA on IHP SG13G2
- Simon Dorrer (Johannes Kepler University (JKU) Linz), Design of an open-source fully-differential adaptive event-based ADC for bio-signal acquisition in 130nm CMOS
- Daniel Schultz, (ElemRV), ElemRV - Open source RISC-V microcontroller
- Zachary Kohnen and Alex Alvarado (Eindhoven University of Technology), Manchester decoder of a home thermostat's wireless protocol in the Tiny Tapeout 07 shuttle (lighting talk)
- Ghaith Al Sabagh (Johannes Kepler University (JKU) Linz), Open-source radar chip (lighting talk)
- Tim Edwards (formerly Efabless, Open Circuit Design), Update on the Efabless "Frigate" next-generation harness chip, the "Panamax" padframe design, and results from the "Chipalooza" (lighting talk)
Analog flow, transistor modelling and circuit simulation
- Arpad Buermen (University of Ljubljana), Recent developments in the Verilog-A circuit analysis kernel
- Deni Alves (Federal University of Santa Catarina - Brasil), ACM2 – A MOSFET model bridging design and simulation
- Volker Mühlhaus (Mühlhaus Consulting & Software GmbH), User friendly workflow for RFIC EM simulation using openEMS
- Martin Köhler (Johannes Kepler University (JKU) Linz), KLayout-PEX
- Felix Salfelder (Gnucap MixedSignals), Progress on Verilog-AMS support in Gnucap
- Tobias Kaiser (TU Berlin), ORDeC: A text-driven analog IC design platform
- Marcus Mellor, (Infinitymdm), CharLib: an open-source standard-cell library characterizer
- Shinichi Nishizawa, (Hiroshima University), libretto: An open-source library characterizer for open-source VLSI design
- Frans Skarman, (Linköping University), Surfer - an extensible and snappy waveform viewer
- Leo Moser (formerly Efabless), Update on CACE (lighting talk)
Hardware security
- Mattis Hasler (Barkhausen Institute), A secure hardware to enable trustworthy computing
- Christian Schulze (Agentur für Innovation in der Cybersicherheit GmbH (Cyberagentur)), Ecosystem verifably secure IT--provable cybersecurity
- Simon Klix (Max Planck Institute for Security and Privacy), HAL (title to be announced)
Policy, EU projects and funding opportunities
- Norbert Herfurth (IHP Microelectronics), The Transparent Reference Fab: A scalable, open blueprint for European semiconductor sovereignty
Economic sustainability
- Melanie Rieback (RadicallyOpenSecurity), Steward ownership and open silicon
- Joaquin Matres Abril, Troy Tamas, Sebastian Goeldi, Floris Laporte, Jan David Fischbach and Matthew Mckee (GDSFactory), An open core model for EDA
Back-end design tools
- Tim Edwards (formerly Efabless, Open Circuit Design), IHP Open PDK integration with Magic, Netgen, and Openlane2
- Mohamed Gaber (The American University in Cairo), OpenLane: Looking to the future
- Philippe Sauter and Thomas Benz (ETH Zurich), An open-source power simulation flow using OpenROAD
- Joaquin Matres Abril, Troy Tamas, Sebastian Goeldi, Floris Laporte, Jan David Fischbach and Matthew Mckee (GDSFactory), GDSFactory+, the all-in-one solution for chip design
- Philippe Sauter and Thomas Benz (ETH Zurich), ArtistIC: An open-source toolchain for top-metal IC art and ultra-high-fidelity GDSII renders
- Peter Thoma (Frankfurt University of Applied Sciences), OpenTwin: An open-source framework for workflow orchestration with enhanced simulation and data management
- Noam Cohen (KleperTech.io), Simplifying and accelerating EDA tool development with the NajaEDA Python library
- Christophe Alexandre (Naja), Open Source interchange format and data structures
- Matthias Köfferlein (KLayout), It's time to reinvent the wheel - a plead for disruptive changes in the file format department
Teaching and education
- Zihao Yu and Xiaoke Su (Institute of Computing Technology, Chinese Academy of Sciences), "One Student One Chip" initiative: Learn to build RISC-V chips from scratch with MOOC
- Yuchi Miao (Institute of Computing Technology, Chinese Academy of Sciences), Teaching open silicon design in a quarter
Organizing committee
Local hosting committee
The event is supported by members of IHP Microelectronics including Kerstin Kaslack, Jonas Linzert, Henriette Mohles, Anna Sojka-Piotrowska and Inesa Posypai.
Donations
We are looking for sponsors to cover extra services at the conference. In case of interest, please see the registration tab here.
Sponsors
Acknowledgements
This conference is co-funded by European Union through the Coordination and Support Action GoIT project with ID number 101070669. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them.
This conference also received funding from the Swiss State Secretariat for Education, Research and Innovation (SERI) under the NGI0 Commons Fund project. The NGI0 Commons Fund has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101135429.