Difference between revisions of "Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes"

Revision as of 16:43, 15 March 2019

Speaker(s): Kirti Bhanushali
email: knbhanus@ncsu.edu
other information: www.ece.ncsu.edu

Slides

File:Slides FreePDK Kirti Bhanushali March15 2019.pdf

Abstract

The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed. This talk mainly focusses on FreePDK15^TM which was developed for 15nm FinFET devices and was developed in collaboration with MentorGraphics. The FreePDK15 kit uses HSPICE Simulation Models from the ASU 14nm PTM-MG HP model (http://ptm.asu.edu). This talk also goes through the development of design rules and discusses the metal-stack including the use of Middle-of-line layouts used for FinFETs ^[1] ^[2]. The material properties used are discussed and it is verified by use of simple/complex layouts.^[3] The kit supports technology library and display resources for Cadence Virtuoso and Mentor Calibre DRC, LVS, and xRC rules.

Software

General information

Repository/Download Link: https://www.eda.ncsu.edu/eda_registration.php
Main documentation website: https://www.eda.ncsu.edu/wiki/FreePDK
Mailing list: If you would like to sign up to receive email alerts of design kit releases, please check out this url: https://www.eda.ncsu.edu/wiki/Ncsu-eda-announcements

References

↑ K. Bhanushali and W. R. Davis, "FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology", In Proceedings of the 2015 Symposium on International Symposium on Physical Design (ISPD '15), pp. 165-170.
↑ K. Bhanushali, "Design Rule Development for FreePDK15: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2014.
↑ C. Tembe, "Layout and Parasitic Extraction for FreePDK15^TM: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2015

[1] K. Bhanushali and W. R. Davis, "FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology", In Proceedings of the 2015 Symposium on International Symposium on Physical Design (ISPD '15), pp. 165-170.

[2] K. Bhanushali, "Design Rule Development for FreePDK15: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2014.

[3] C. Tembe, "Layout and Parasitic Extraction for FreePDK15^TM: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2015

[1]

[2]

[3]

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 ==Abstract==
-The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed<ref> K. Bhanushali and W. R. Davis, "FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology", In ''Proceedings of the 2015 Symposium on International Symposium on Physical Design'' (ISPD '15), pp. 165-170.</ref> . This talk mainly focusses on FreePDK15<sup>TM</sup> which was developed for 15nm FinFET devices and was developed in collaboration with [http://www.mentor.com MentorGraphics]. The FreePDK15 kit uses HSPICE Simulation Models from the ASU 14nm PTM-MG HP model (http://ptm.asu.edu). It supports technology library and display resources for Cadence Virtuoso and Calibre DRC, LVS, and xRC rules.<ref> K. Bhanushali, "Design Rule Development for FreePDK15: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2014.</ref> <ref> C. Tembe, "Layout and Parasitic Extraction for FreePDK15<sup>TM</sup>: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2015 </ref>
+The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed. This talk mainly focusses on FreePDK15<sup>TM</sup> which was developed for 15nm FinFET devices and was developed in collaboration with [http://www.mentor.com MentorGraphics]. The FreePDK15 kit uses HSPICE Simulation Models from the ASU 14nm PTM-MG HP model (http://ptm.asu.edu). This talk also goes through the development of design rules and discusses the metal-stack including the use of Middle-of-line layouts used for FinFETs <ref> K. Bhanushali and W. R. Davis, "FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology", In ''Proceedings of the 2015 Symposium on International Symposium on Physical Design'' (ISPD '15), pp. 165-170.</ref> <ref> K. Bhanushali, "Design Rule Development for FreePDK15: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2014.</ref>. The material properties used are discussed and it is verified by use of simple/complex layouts.<ref> C. Tembe, "Layout and Parasitic Extraction for FreePDK15<sup>TM</sup>: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2015 </ref> The kit supports technology library and display resources for Cadence Virtuoso and Mentor Calibre DRC, LVS, and xRC rules.
 ==Software==