Difference between revisions of "Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes"

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* Speaker(s): Kirti Bhanushali
* Speaker(s): Kirti Bhanushali
* email: knbhanus@ncsu.edu  
* email: knbhanus@ncsu.edu  
* other information: www.ece.ncsu.edu
* other information: www.ece.ncsu.edu


==Slides==
==Downloads==
[[File:Slides FreePDK Kirti Bhanushali March15 2019.pdf|thumb]]
* [[:File:Slides FreePDK Kirti Bhanushali March15 2019.pdf|Slides]]
* [https://peertube.f-si.org/videos/watch/93d61de2-61b5-4b59-aeea-4337dd598f74 Video recording]


==Abstract==
==Abstract==

Latest revision as of 17:44, 16 July 2019

  • Speaker(s): Kirti Bhanushali
  • email: knbhanus@ncsu.edu
  • other information: www.ece.ncsu.edu

Downloads

Abstract

The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed. This talk mainly focusses on FreePDK15TM which was developed for 15nm FinFET devices and was developed in collaboration with MentorGraphics. The FreePDK15 kit uses HSPICE Simulation Models from the ASU 14nm PTM-MG HP model (http://ptm.asu.edu). This talk also goes through the development of design rules and discusses the metal-stack including the use of Middle-of-line layouts used for FinFETs [1] [2]. The material properties used are discussed and it is verified by use of simple/complex layouts.[3] The kit supports technology library and display resources for Cadence Virtuoso and Mentor Calibre DRC, LVS, and xRC rules.

Software

General information

References

  1. K. Bhanushali and W. R. Davis, "FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology", In Proceedings of the 2015 Symposium on International Symposium on Physical Design (ISPD '15), pp. 165-170.
  2. K. Bhanushali, "Design Rule Development for FreePDK15: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2014.
  3. C. Tembe, "Layout and Parasitic Extraction for FreePDK15TM: An Open Source Predictive Process Design Kit for 15nm FinFET Devices," Masters Thesis, NCSU, 2015