Difference between revisions of "Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes"
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==Abstract== | ==Abstract== | ||
The design rules, layout guidelines and evolution | The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed. This talk mainly focusses on FreePDK15<sup>TM</sup> which was developed for 15nm FinFET devices and was developed in collaboration with #REDIRECT [[MentorGraphics]]. | ||
rules are developed for critical dimensions. In order to improve the FinFET layout density, Middle-of-line local interconnect layers are implemented for the FinFET layout. The | 1. | ||
Additional design rules are introduced considering process variability, and challenges involved in fabrication beyond 20nm. Particularly, double patterning lithography is assumed and a unique set of design rules are developed for critical dimensions. In order to improve the FinFET layout density, Middle-of-line local interconnect layers are implemented for the FinFET layout. The | |||
rules are further validated by running Calibre design-rule checks on Virtuoso layout of an Inverter and NAND4 cells. As part of the validation process, the area of a FreePDK15 | rules are further validated by running Calibre design-rule checks on Virtuoso layout of an Inverter and NAND4 cells. As part of the validation process, the area of a FreePDK15 | ||
inverter was compared to the area of an inverter in 45nm bulk MOS process and the ratio was found to be 1:6. This kit primarily aims to support introduction of sub-20nm FinFET devices into research and universities. | inverter was compared to the area of an inverter in 45nm bulk MOS process and the ratio was found to be 1:6. This kit primarily aims to support introduction of sub-20nm FinFET devices into research and universities. |
Revision as of 16:25, 11 March 2019
- Speaker(s): Kirti Bhanushali
- email: knbhanus@ncsu.edu
- other information: xxx
Slides
Talk_title_name.pdf (to upload a file: go to Edit mode, then click on the fourth icon from the left "Embed file" and follow the instructions)
Abstract
The design rules, layout guidelines and evolution of the open source predictive process design kit (PDK) FreePDK are discussed. This talk mainly focusses on FreePDK15TM which was developed for 15nm FinFET devices and was developed in collaboration with #REDIRECT MentorGraphics. 1. Additional design rules are introduced considering process variability, and challenges involved in fabrication beyond 20nm. Particularly, double patterning lithography is assumed and a unique set of design rules are developed for critical dimensions. In order to improve the FinFET layout density, Middle-of-line local interconnect layers are implemented for the FinFET layout. The rules are further validated by running Calibre design-rule checks on Virtuoso layout of an Inverter and NAND4 cells. As part of the validation process, the area of a FreePDK15 inverter was compared to the area of an inverter in 45nm bulk MOS process and the ratio was found to be 1:6. This kit primarily aims to support introduction of sub-20nm FinFET devices into research and universities.
Software
General information
- Repository: https://xxxx.yyy
- Main documentation website: https://www.eda.ncsu.edu/wiki/FreePDK
- Wikipedia page: https://en.wikipedia.org/wiki/XXX-YYY-ZZZ (if a wikipedia page about the software, or a page mentioning it, does not exist yet, please consider creating one). If it gets reverted or deleted, please create a page on https://wiki.f-si.org
- Wiki page on wiki.f-si.org: https://wiki.f-si.org/index.php/XXX-YYY-ZZZ
- The software has been used in the following projects: XXX, YYY, ZZZ
Roadmap
- The software wishes to interface with the following tools: XXX, YYY
- The project seeks help on: XXX, YYY