Difference between revisions of "Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology"
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==Downloads== | ==Downloads== | ||
* [[: | * [[:File:2023 FSiC Pretl v1.0 handout.pdf|Slides]] | ||
* [https://peertube.f-si.org/videos/watch/a5e7f845-737f-4ce8-8857-47f92a1a8df0 Video recording] | |||
==Abstract== | ==Abstract== | ||
Latest revision as of 22:22, 28 July 2023
- Speaker: Harald Pretl
- Email: harald.pretl@jku.at
- Affiliation: Institute for Integrated Circuits (IIC), Johannes Kepler University (JKU), Linz, Austria
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Abstract
This work presents the design of an integrated untrimmed 12-bit non-binary fully differential successive approximation register analog-to-digital converter (SAR- ADC) based on the SKY130 open-source PDK using free and open-source design software (FOSS).
References
- Repository ADC: https://github.com/iic-jku/SKY130_SAR-ADC1
- Repository design software: https://github.com/iic-jku/iic-osic-tools
- Extended documentation (PDF): https://epub.jku.at/obvulihs/download/pdf/8694768?originalFilename=true