Difference between revisions of "Design of a 1.2MS/s Charge-Redistribution Non-Binary SAR-ADC Utilizing the SKY130 Open-Source Technology"
Jump to navigation
Jump to search
m |
|||
| Line 5: | Line 5: | ||
==Downloads== | ==Downloads== | ||
* [[:File:File_name.pdf|Slides]] (slides coming soon...) | * [[:File:File_name.pdf|Slides]] (slides coming soon...) | ||
[[File:2023 FSiC Pretl v1.0 handout.pdf|thumb|Slides]] | |||
==Abstract== | ==Abstract== | ||
Revision as of 10:28, 9 July 2023
- Speaker: Harald Pretl
- Email: harald.pretl@jku.at
- Affiliation: Institute for Integrated Circuits (IIC), Johannes Kepler University (JKU), Linz, Austria
Downloads
- Slides (slides coming soon...)
File:2023 FSiC Pretl v1.0 handout.pdf
Abstract
This work presents the design of an integrated untrimmed 12-bit non-binary fully differential successive approximation register analog-to-digital converter (SAR- ADC) based on the SKY130 open-source PDK using free and open-source design software (FOSS).
References
- Repository ADC: https://github.com/iic-jku/SKY130_SAR-ADC1
- Repository design software: https://github.com/iic-jku/iic-osic-tools
- Extended documentation (PDF): https://epub.jku.at/obvulihs/download/pdf/8694768?originalFilename=true