Difference between revisions of "FSiC2025 draft 193841"

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====High-level design and logic-synthesis====
====High-level design and logic-synthesis====
* Leo Moser ([https://efabless.com/ Efabless]), ''[[Greyhound: A RISC-V SoC with tightly coupled eFPGA]]''
* Edward Bingham ([https://broccolimicro.io/ Broccolimicro]), ''[[The potential for asynchronous circuits to bridge the hardware / software divide]]''


====Foundries and PDKs====
====Foundries and PDKs====
* Tim Edwards ([https://efabless.com/ Efabless], [http://opencircuitdesign.com/ Open Circuit Design]), ''[[IHP Open PDK integration with Magic, Netgen, and Openlane2]]''


====On-going FOS silicon projects====
====On-going FOS silicon projects====
*  Simon Dorrer ([https://iic.jku.at/ Johannes Kepler University (JKU) Linz]), ''[[Event-Based ADC in IHP's 130nm PDK]]''


====Analog flow, transistor modelling and circuit simulation====
====Analog flow, transistor modelling and circuit simulation====
* Arpad Buermen ([https://fides.fe.uni-lj.si/~arpadb/cv/cv2024.pdf University of Ljubljana]), ''[[Recent Developments in the Verilog-A Circuit Analysis Kernel]]''
* Deni Alves ([https://deel.ufsc.br/ Federal University of Santa Catarina - Brasil]), ''[[ACM2 – A MOSFET Model Bridging Design and Simulation]]''


====Hardware security====
====Hardware security====
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====Back-end design tools====
====Back-end design tools====
* Mohamed Gaber ([https://aucegypt.edu> The American University in Cairo]), ''[[OpenLane: Looking to the Future]]''
* Philippe Sauter and Thomas Benz ([https://www.ethz.ch/ ETH Zurich]), ''[[An Open-Source Power Simulation Flow using OpenROAD]]''
* Christophe Alexandre ([https://github.com/xtofalex/naja Naja]), ''[[Open Source interchange format and data structures]]''
====Teaching and education====
* OSOC Team, ''[["One Student One Chip" Initiative: Learn to Build RISC-V Chips from Scratch with MOOC]]''
* Yuchi Miao ([http://english.ict.cas.cn/ Institute of Computing Technology, Chinese Academy of Sciences]), ''[[Teaching Open Silicon Design in a Quarter]]''
* Philippe Sauter and Thomas Benz ([https://www.ethz.ch/ ETH Zurich]), ''[[ArtistIC: An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders]]''
====Lighting talks====
* Zachary Kohnen and Alex Alvarado ([https://tue.nl Eindhoven University of Technology]), ''[[Manchester decoder of a home thermostat's wireless protocol in the Tiny Tapeout 07 shuttle]]''


== Organizing committee ==
== Organizing committee ==

Revision as of 14:16, 12 March 2025

Free Silicon Conference 2025
Fsic2025 logo.png
GenreFree software and free hardware development conference
Location(s)IHP Microelectronics, Frankfurt an der Oder
CountryGermany
Websitewiki.f-si.org/index.php/FSiC2025


The 2025 Free Silicon Conference (FSiC) will take place at IHP Microelectronics (Frankfurt an der Oder) on July 2, 3, 4 2025 (Wednesday to Friday). This event will build on top of the past FSiC editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification.

Submission

This is your opportunity to present your project and to get in touch with the community. For proposing a talk, please submit a title and a short summary at fsic2025 'at' f-si.org by April 1st (second submission phase). Topics are not restricted to the tentative program.

Participation

To participate to the conference it is necessary to register here.

From this year we have introduced a ticket:

  • for non-profit, enthusiasts, free-time contributors: free admission
  • for affiliated students: early bird 160 €, regular 200 €
  • for professionals: early bird 340 €, regular 400 €

Tentative program

High-level design and logic-synthesis

Foundries and PDKs

On-going FOS silicon projects

Analog flow, transistor modelling and circuit simulation

Hardware security

Policy, EU projects and funding opportunities

Standards

Economic sustainability

Back-end design tools

Teaching and education

Lighting talks

Organizing committee

Fsic2025 pa.png
Panos Alevropoulos
Lawyer and FSF volunteer
‟For democracy to thrive, technology must empower, not control.”
Fsic2022 la.png
Luca Alloatti
Libre hardware promoter
‟Technology is political. I stand for defending free access to technology and the right for transparency.”
Fsic2024 gc.png
Gaëtan Cassiers
Hardware security researcher
‟Free and transparent technology empowers people and protects fundamental freedoms.”
Fsic2024 cgg.png
Constantin Gierczak-Galle
Student and enthousiast
‟Technology can be both Mankind's development and demise. Promoting the former while hindering the latter can only happen through decentralization, democratization and open collaboration.”
Fsic2022 mk.png
Matthias Köfferlein
FOSS EDA author
‟I am passionate about helping people with my technical skills. Coding EDA is like gardening to me: may it grow and feed people.”
Fsic2022 tk.png
Thomas Kramer
Skeptical technology enthusiast
‟I like to understand technology, to adapt and enhance it. Technology should not be mythical or owned by experts only, it needs to be comprehensible.”
Fsic2024 ms.png
Martin Schoeberl
Professor at DTU
‟Open-source tools and technology gives freedom to students to explore chip design on their own and on their computers, not limiting them to the walled garden of a dedicated lab at the University.”
Fsic2025 rs.png
René Scholz
Group Leader at IHP
‟Our goal is to make open source EDA tools and design flows easily accessible and usable for anyone who wants to get into ASIC chip design, test new design ideas and develop them to a manufacturable level.”

Local hosting committee

The event is supported by members of IHP Microelectronics including Kerstin Kaslack, Jonas Linzert, Henriette Mohles, Anna Sojka-Piotrowska and Inesa Posypai.

Donations

We are looking for sponsors to cover extra services at the conference. In case of interest, please see the registration tab here.

Sponsors

IHP Microelectronics.png DTU Logo.jpg

Acknowledgements

This conference is co-funded by European Union through the Coordination and Support Action GoIT project with ID number 101070669. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them.

EU-co-funded.jpg GoIT.png

This conference also received funding from the Swiss State Secretariat for Education, Research and Innovation (SERI) under the NGI0 Commons Fund project. The NGI0 Commons Fund has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101135429.

Funded by SERI logo NGI Zero Logo