Difference between revisions of "FSiC2022"
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* 16:30-17:00, Hagen Sankowski ([https://libresilicon.com/ Libre Silicon]), ''Standard Cell Library report'' | * 16:30-17:00, Hagen Sankowski ([https://libresilicon.com/ Libre Silicon]), ''Standard Cell Library report'' | ||
* 17:00-17:30, Sebastian Wiedemann ([https://www.tuwien.at/ TU Wien]), ''go2async: A high-level synthesis tool for asynchronous circuits'' | * 17:00-17:30, Sebastian Wiedemann ([https://www.tuwien.at/ TU Wien]), ''go2async: A high-level synthesis tool for asynchronous circuits'' | ||
* 17:30-18:00, Matthias Koefferlein, KLayout XSection tool - Deep insights or nonsense in colors? | * 17:30-18:00, Matthias Koefferlein ([https://klayout.de KLayout]), KLayout XSection tool - Deep insights or nonsense in colors? | ||
==== Evening program ==== | ==== Evening program ==== | ||
Revision as of 10:08, 30 June 2022
| Free Silicon Conference 2022 | |
|---|---|
 | |
| Genre | Free software and free hardware development conference |
| Location(s) | Paris, Sorbonne Université |
| Country | France |
| Website | wiki.f-si.org/index.php/FSiC2022 |
The 2022 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 7,8,9 2022 (Thursday to Saturday). This event will build on top of the 2019 edition. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification. The conference consists of three full days, including a Saturday for facilitating those who are involved as non-professionals. After the daily talks, the discussion will continue until late in an informal and relaxed atmosphere at the nearby botanical garden "Jardin des plantes", at the ancient roman theater "Arènes de Lutèce" or (depending on the weather) in the on-campus facilities.
Objectives and motto
The goal of FSiC is to make the technology accessible to small businesses, startups, universities and schools. Students, makers and professional should have direct access to education, without barriers, paywalls and legal burdens.
What's the value of multi-billion public investments if there aren't designers, engineers and other experts who can operate the industry and who master the tools to innovate?
We all took apart watches and radios when we were kids, hence we learned how they work. It is time to look inside chips and their tool-chains so that we can study, improve and trust them.
The conference motto is therefore: Education, dissemination and innovation by openness and collaboration!
News
From April 15 we continue with direct invitations and we work to consolidate the program.
Until April 15 we are calling for talks. During this period the conference program will still be fluid: new sessions may appear and new topics may be added. For example, we are considering adding a session about public funding opportunities and one about FOS business models. If you want to propose a talk please contact us by writing at fsic2022 'at' f-si.org.
During the month of February we run the "search and discovery" phase: We asked our network (through email and mastodon) to propagate the FSiC announcement and to suggest us new potentials speakers/attendees. We were suggested ten new names. Thanks for the contributions!
Abstract submission
For submitting an abstract or a title, or just for proposing informally a talk, contact us per email at fsic2022 'at' f-si.org. Do not hesitate!
Participation
Participation to the conference is free of charge but the attendance must be reserved per email at fsic2022 'at' f-si.org. Details will be announced on this page and over the mastodon channel.
Organizing committee
Conference program
July 7, Thursday (Day 1)
- 9:00-9:30, Registration and coffee
Welcome
- 9:30-9:45, Welcome from the LIP6
- 9:45-9:55, Welcome from the Free Silicon Foundation
Keynote speech
- 10:00-10:30, Jan Suhr (Nitrokey), title to be announced
High-level design
- 10:30-11:00, Charles Papon (SpinalHDL), Composing an out-of-order CPU using software technics
- 11:00-11:30, Christoph Grimm (Kaiserslautern University), Inclusive Modeling with SysMD
- 11:30-12:00 Tristan Gingold (GHDL), Wishbone: a free SoC bus family
- 12:00-13:30, lunch break
- 13:30-14:00, Johan Euphrosine (Google), Porting software to hardware using XLS and open source PDKs
- 14:00-14:30, Tristan Gingold (GHDL), Synthesis with ghdl
Hardware security
- 14:30-15:00, Tomas Aidukas (Paul Scherrer Institut), 3D X-ray Nano Imaging for Chip Inspection
- 15:00-15:30, Roselyne Chotin (Sorbonne Université - LIP6) and Lilia Zaourar (CEA), Logic locking as an example to introduce security in an open CAD flow
On-going FOS silicon projects
- 15:30-16:00, Matthew Venn (ChipFlow), How many designs can you fit on a single die
- 16:00-16:30, Afternoon break. Coffee is served on-campus
- 16:30-17:00, Hagen Sankowski (Libre Silicon), Standard Cell Library report
- 17:00-17:30, Sebastian Wiedemann (TU Wien), go2async: A high-level synthesis tool for asynchronous circuits
- 17:30-18:00, Matthias Koefferlein (KLayout), KLayout XSection tool - Deep insights or nonsense in colors?
Evening program
- 18:00-20:00, Gathering at the Jardin des plantes
July 8, Friday (Day 2)
- 8:30-9:30, Early bird coffee and tea
Keynote speech
- 9:30-10:00, Frank Karlitschek (Nextcloud), Why Open Hardware and Open Software are necessary for our future
Foundries and PDKs
- 10:00-10:30, Frank Vater (IHP Microelectronics), OpenSource PDK - A key enabler to unlock the potential of an open source design flow
- 10:30-11:00, Kholdoun Torki (CMP), 65nm CMOS Design-Flows on Free and Open-Source Tools : An Overview
- 11:00-11:30, Staf Verhaegen (Chip4Makers), PDKMaster & co.: a framework for scalable and technology portable standard cell, IO and SRAM libraries
- 11:30-12:00, Naohiko Shimizu (Tokai University), Challenge to Fabricate LSI without NDA with Open Method
- 12:00-13:30, lunch break
Schematic editors
- 13:30-14:00, Stef Schippers (XSCHEM), XSCHEM - circuit schematic editor for VLSI, ASIC, PCB design
Microcontrollers
- 14:00-14:30, Philipp Klaus Krause (Uni Freiburg), F8 - an architecture for 8-bit µC based on lessons learned from the free Small Device C Compiler
Photonics
- 14:30-15:00, Ronald Broeke (Nazca Design), Nazca Design, a balancing act between open source tooling and propriety PDKs in photonics
- 15:00-15:30, Joaquin Matres Abril (Google), gdsfactory
- 15:30-16:00, Dima Pustakhod (TU/e), title to be announced
- 16:00-17:00, Afternoon break. Coffee is served on-campus
Mixed-signal/analog design
- 17:00-17:30, Felix Salfelder (GnuCap), Merging Gnucap and Qucs -- The Why and How
- 17:30-18:00, Tim Edwards (Open Circuit Design), Whom do you trust?: Validating process parameters for open-source tools
Evening program
- 18:15-21:00, Gathering at the ancient roman theater "Arènes de Lutèce"
July 9, Saturday (Day 3)
- 8:30-9:30, Early bird coffee and tea
Back-end flow: placement, routing, timing closure
- 9:30-10:00, Thomas Kramer (LibrEDA), LibrEDA - digital place-and-route framework from scratch
- 10:00-10:30, Gabriel Gouvine, Digital placement algorithms in Coriolis
- 10:30-11:00, Christophe Alexandre (Naja), Naja: an open source framework for EDA post synthesis flow development
Tutorials
- 11:00-12:00, Matthias Koefferlein (KLayout), Tutorial and FAQ on physical verification, DRC+LVS
- 12:00-13:30, lunch break
Funding opportunities
- 13:30-13:45, Michiel Leenaars (NLnet Foundation) NGI0 Entrust
Paving the road for open source flow: gaps, challenges, opportunities
- 13:45-15:30, open discussion
- 15:30-16:00, conclusions
Practical information
Coffees are kindly offered by Sorbonne Université, LIP6, IRILL and CNRS. Lunches are self organized by the attendees.
Donations
We are looking for sponsors to cover the conference costs. In case of interest, please write at fsic2022 'at' f-si.org. Bank coordinates are available here.
Sponsors
Academic Sponsors
