ASICone. Goals, timeline, participants and tools: Difference between revisions
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* Speaker: Edmund Humenberger | |||
==Downloads== | |||
* [[:File:Free silicon.pdf|Slides]] | |||
* [https://peertube.f-si.org/videos/watch/7f0d58b4-ef95-4f9c-ba68-7f9c8a03e91d Video recording] | |||
==Abstract== | |||
ASICone is an experiment by [https://www.symbioticeda.com Symbiotic EDA] to tape out a minimal RISC-V core using mainly open source EDA and ASIC tools. | ASICone is an experiment by [https://www.symbioticeda.com Symbiotic EDA] to tape out a minimal RISC-V core using mainly open source EDA and ASIC tools. | ||
It will be manufactured by X-Fab in 180nm. Tape out is planned for Nov 2019. The goal of the project is to gain experience with the existing open source tools and improve them where needed. | It will be manufactured by X-Fab in 180nm. Tape out is planned for Nov 2019. The goal of the project is to gain experience with the existing open source tools and improve them where needed. | ||
Currently 4 people are working on the project, where one is working full time. One of them is a seasoned digital chip designer and software engineer, and one is a seasoned analog designer. | Currently 4 people are working on the project, where one is working full time. One of them is a seasoned digital chip designer and software engineer, and one is a seasoned analog designer. | ||
Latest revision as of 15:39, 16 July 2019
- Speaker: Edmund Humenberger
Downloads
Abstract
ASICone is an experiment by Symbiotic EDA to tape out a minimal RISC-V core using mainly open source EDA and ASIC tools. It will be manufactured by X-Fab in 180nm. Tape out is planned for Nov 2019. The goal of the project is to gain experience with the existing open source tools and improve them where needed.
Currently 4 people are working on the project, where one is working full time. One of them is a seasoned digital chip designer and software engineer, and one is a seasoned analog designer.