Difference between revisions of "FSiC2025"
(3 intermediate revisions by the same user not shown) | |||
Line 13: | Line 13: | ||
==Submission== | ==Submission== | ||
This is your opportunity to present your project and to get in touch with the community. For proposing a talk, please submit a title and a short summary at fsic2025 'at' f-si.org by | This is your opportunity to present your project and to get in touch with the community. For proposing a talk, please submit a title and a short summary at fsic2025 'at' f-si.org by April 1st (second submission phase). Topics are not restricted to the tentative program. | ||
== Participation == | == Participation == | ||
To participate to the conference, both as speaker and as attendee, it is necessary to register [https://www.ihp-microelectronics.com/events-1/detail/free-silicon-conference-2025 here]. | |||
From this year we have introduced a ticket: | |||
* for non-profit, enthusiasts, free-time contributors: free admission | |||
* for affiliated students: early bird 160 €, regular 200 € | |||
* for professionals: early bird 340 €, regular 400 € | |||
== Tentative program == | == Tentative program == | ||
====High-level design and logic-synthesis==== | ====High-level design and logic-synthesis==== | ||
* Leo Moser ([https://efabless.com/ Efabless]), ''[[Greyhound: A RISC-V SoC with tightly coupled eFPGA]]'' | |||
* Edward Bingham ([https://broccolimicro.io/ Broccolimicro]), ''[[The potential for asynchronous circuits to bridge the hardware / software divide]]'' | |||
====Foundries and PDKs==== | ====Foundries and PDKs==== | ||
* Tim Edwards ([https://efabless.com/ Efabless], [http://opencircuitdesign.com/ Open Circuit Design]), ''[[IHP Open PDK integration with Magic, Netgen, and Openlane2]]'' | |||
====On-going FOS silicon projects==== | ====On-going FOS silicon projects==== | ||
* Simon Dorrer ([https://iic.jku.at/ Johannes Kepler University (JKU) Linz]), ''[[Event-Based ADC in IHP's 130nm PDK]]'' | |||
====Analog flow, transistor modelling and circuit simulation==== | ====Analog flow, transistor modelling and circuit simulation==== | ||
* Arpad Buermen ([https://fides.fe.uni-lj.si/~arpadb/cv/cv2024.pdf University of Ljubljana]), ''[[Recent Developments in the Verilog-A Circuit Analysis Kernel]]'' | |||
* Deni Alves ([https://deel.ufsc.br/ Federal University of Santa Catarina - Brasil]), ''[[ACM2 – A MOSFET Model Bridging Design and Simulation]]'' | |||
====Hardware security==== | ====Hardware security==== | ||
Line 37: | Line 48: | ||
====Back-end design tools==== | ====Back-end design tools==== | ||
* Mohamed Gaber ([https://aucegypt.edu> The American University in Cairo]), ''[[OpenLane: Looking to the Future]]'' | |||
* Philippe Sauter and Thomas Benz ([https://www.ethz.ch/ ETH Zurich]), ''[[An Open-Source Power Simulation Flow using OpenROAD]]'' | |||
* Christophe Alexandre ([https://github.com/xtofalex/naja Naja]), ''[[Open Source interchange format and data structures]]'' | |||
====Teaching and education==== | |||
* OSOC Team, ''[["One Student One Chip" Initiative: Learn to Build RISC-V Chips from Scratch with MOOC]]'' | |||
* Yuchi Miao ([http://english.ict.cas.cn/ Institute of Computing Technology, Chinese Academy of Sciences]), ''[[Teaching Open Silicon Design in a Quarter]]'' | |||
* Philippe Sauter and Thomas Benz ([https://www.ethz.ch/ ETH Zurich]), ''[[ArtistIC: An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders]]'' | |||
====Lighting talks==== | |||
* Zachary Kohnen and Alex Alvarado ([https://tue.nl Eindhoven University of Technology]), ''[[Manchester decoder of a home thermostat's wireless protocol in the Tiny Tapeout 07 shuttle]]'' | |||
== Organizing committee == | == Organizing committee == | ||
<div style="width:80%;"> | |||
<div style="display:table; border-spacing: 1rem"> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle;"> | |||
[[File:fsic2025_pa.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Panos Alevropoulos</b></div> | |||
<div><i>Lawyer and FSF volunteer</i></div> | |||
<div>https://mastodon.social/@panosalevropoulos</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟For democracy to thrive, technology must empower, not control.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle;"> | |||
[[File:fsic2022_la.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Luca Alloatti</b></div> | |||
<div><i>Libre hardware promoter</i></div> | |||
<div>https://orcid.org/0000-0002-1245-4179</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟Technology is political. I stand for defending free access to technology and the right for transparency.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle"> | |||
[[File:fsic2024_gc.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Gaëtan Cassiers </b></div> | |||
<div><i>Hardware security researcher</i></div> | |||
<div>https://perso.cassiersg.be</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟Free and transparent technology empowers people and protects fundamental freedoms.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle"> | |||
<!-- TODO: make round! --> | |||
[[File:fsic2024_cgg.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Constantin Gierczak-Galle</b></div> | |||
<div><i>Student and enthousiast</i></div> | |||
<!-- TODO <div>https://xxx</div> --> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟Technology can be both Mankind's development and demise. Promoting the former while hindering the latter can only happen through decentralization, democratization and open collaboration.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle;"> | |||
[[File:fsic2022_mk.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Matthias Köfferlein</b></div> | |||
<div><i>FOSS EDA author</i></div> | |||
<div>https://www.klayout.org</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟I am passionate about helping people with my technical skills. Coding EDA is like gardening to me: may it grow and feed people.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle;"> | |||
[[File:fsic2022_tk.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Thomas Kramer</b></div> | |||
<div><i>Skeptical technology enthusiast</i></div> | |||
<div>https://libreda.org</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟I like to understand technology, to adapt and enhance it. Technology should not be mythical or owned by experts only, it needs to be comprehensible.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle"> | |||
[[File:Fsic2024_ms.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>Martin Schoeberl</b></div> | |||
<div><i>Professor at DTU</i></div> | |||
<div>https://www.imm.dtu.dk/~masca/</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟Open-source tools and technology gives freedom to students to explore chip design on their own and on their computers, not limiting them to the walled garden of a dedicated lab at the University.”</nowiki></div> | |||
</div> | |||
<div style="display:table-row"> | |||
<div style="display:table-cell; vertical-align: middle"> | |||
[[File:Fsic2025_rs.png|64px|frameless|none]] | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem"> | |||
<div><b>René Scholz</b></div> | |||
<div><i>Group Leader at IHP</i></div> | |||
<div>https://github.com/IHP-GmbH</div> | |||
</div> | |||
<div style="display:table-cell; padding-left: 2rem; text-align: center; vertical-align: middle;"><nowiki>‟Our goal is to make open source EDA tools and design flows easily accessible and usable for anyone who wants to get into ASIC chip design, test new design ideas and develop them to a manufacturable level.”</nowiki></div> | |||
</div> | |||
</div> | |||
</div> | |||
==Local hosting committee== | |||
The event is supported by members of [https://www.ihp-microelectronics.com/ IHP Microelectronics] including '''Kerstin Kaslack''', '''Jonas Linzert''', '''Henriette Mohles''', '''Anna Sojka-Piotrowska''' and '''Inesa Posypai'''. | |||
== Donations == | == Donations == | ||
We are looking for sponsors to cover extra services at the conference | We are looking for sponsors to cover extra services at the conference. In case of interest, please see the registration tab [https://www.ihp-microelectronics.com/events-1/detail/free-silicon-conference-2025 here]. | ||
==Sponsors== | |||
[[File:IHP_solutions.png|180px|link=https://www.ihp-solutions.com/]] | |||
[[File:DTU Logo.jpg|180px|link=dtu.dk]] | |||
==Acknowledgements== | |||
This conference is co-funded by European Union through the Coordination and Support Action [https://goit-project.eu GoIT] project with ID number 101070669. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them. | |||
[[File:EU-co-funded.jpg|500px|link=https://ec.europa.eu/info/funding-tenders/opportunities/portal/screen/opportunities/topic-details/horizon-cl4-2021-digital-emerging-01-05]] | |||
[[File:GoIT.png|300px|link=https://goit-project.eu]] | |||
This conference also received funding from the Swiss State Secretariat for Education, Research and Innovation (SERI) under the [https://nlnet.nl/commonsfund/ NGI0 Commons Fund] project. The NGI0 Commons Fund has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101135429. | |||
[[File:WBF SBFI EU Frameworkprogramme E RGB pos quer.png|500px|alt=Funded by SERI logo]] | |||
[[File:NGI0 tag.svg|500px|alt=NGI Zero Logo]] |
Latest revision as of 12:38, 13 March 2025
Free Silicon Conference 2025 | |
---|---|
![]() | |
Genre | Free software and free hardware development conference |
Location(s) | IHP Microelectronics, Frankfurt an der Oder |
Country | Germany |
Website | wiki.f-si.org/index.php/FSiC2025 |
The 2025 Free Silicon Conference (FSiC) will take place at IHP Microelectronics (Frankfurt an der Oder) on July 2, 3, 4 2025 (Wednesday to Friday). This event will build on top of the past FSiC editions. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture, to layout and verification.
Submission
This is your opportunity to present your project and to get in touch with the community. For proposing a talk, please submit a title and a short summary at fsic2025 'at' f-si.org by April 1st (second submission phase). Topics are not restricted to the tentative program.
Participation
To participate to the conference, both as speaker and as attendee, it is necessary to register here.
From this year we have introduced a ticket:
- for non-profit, enthusiasts, free-time contributors: free admission
- for affiliated students: early bird 160 €, regular 200 €
- for professionals: early bird 340 €, regular 400 €
Tentative program
High-level design and logic-synthesis
- Leo Moser (Efabless), Greyhound: A RISC-V SoC with tightly coupled eFPGA
- Edward Bingham (Broccolimicro), The potential for asynchronous circuits to bridge the hardware / software divide
Foundries and PDKs
- Tim Edwards (Efabless, Open Circuit Design), IHP Open PDK integration with Magic, Netgen, and Openlane2
On-going FOS silicon projects
Analog flow, transistor modelling and circuit simulation
- Arpad Buermen (University of Ljubljana), Recent Developments in the Verilog-A Circuit Analysis Kernel
- Deni Alves (Federal University of Santa Catarina - Brasil), ACM2 – A MOSFET Model Bridging Design and Simulation
Hardware security
Policy, EU projects and funding opportunities
Standards
Economic sustainability
Back-end design tools
- Mohamed Gaber (> The American University in Cairo), OpenLane: Looking to the Future
- Philippe Sauter and Thomas Benz (ETH Zurich), An Open-Source Power Simulation Flow using OpenROAD
- Christophe Alexandre (Naja), Open Source interchange format and data structures
Teaching and education
- Yuchi Miao (Institute of Computing Technology, Chinese Academy of Sciences), Teaching Open Silicon Design in a Quarter
- Philippe Sauter and Thomas Benz (ETH Zurich), ArtistIC: An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders
Lighting talks
- Zachary Kohnen and Alex Alvarado (Eindhoven University of Technology), Manchester decoder of a home thermostat's wireless protocol in the Tiny Tapeout 07 shuttle
Organizing committee
Local hosting committee
The event is supported by members of IHP Microelectronics including Kerstin Kaslack, Jonas Linzert, Henriette Mohles, Anna Sojka-Piotrowska and Inesa Posypai.
Donations
We are looking for sponsors to cover extra services at the conference. In case of interest, please see the registration tab here.
Sponsors
Acknowledgements
This conference is co-funded by European Union through the Coordination and Support Action GoIT project with ID number 101070669. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them.
This conference also received funding from the Swiss State Secretariat for Education, Research and Innovation (SERI) under the NGI0 Commons Fund project. The NGI0 Commons Fund has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101135429.