From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD

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  • Speaker(s): Charles Papon
  • email: charles.papon.90@gmail.com

Slides

File:Fsic2019 SpinalHDL.pdf

Abstract

This talk will fly around different aspects of designing the netlist of a low-tech SoC, by exposing the practical case of VexRiscv the related technologies and challenges.

General information

Roadmap

  • The project seeks help on: Exploring new hardware description methodologies