FSiC2026

Free Silicon Conference 2026
Genre	Free software and free hardware development conference
Location(s)	University of Ljubljana, Faculty of Electrical Engineering
Country	Slovenia
Website	wiki.f-si.org/index.php/FSiC2026

The 2026 Free Silicon Conference (FSiC) will take place at University of Ljubljana, Faculty of Electrical Engineering, on July 6 to 8 2026 (Monday to Wednesday). This event will build on previous FSiC editions. The conference will connect experts and enthusiasts who want to build a complete free and open-ource CAD ecosystem for designing analog and digital integrated circuits. The conference will cover the full spectrum of the design process, from system architecture to layout and verification.

Submission

This is your opportunity to present your project and to get in touch with the community. To propose a talk, please submit a title and a short summary at fsic2026 'at' f-si.org by April 1st 2026 (second submission phase). Topics are not restricted to the tentative program.

Participation

Information about registration will be published soon.

Tentative program

Digital design and logic-synthesis

• Noam Cohen (KeplerTech.io), Kepler-formal
• Andreas Krall (TU Wien), Progress of OpenVADL: tensors and hardware generation (lightning talk)

Ongoing FOS silicon projects

• Sylvain Munaut (smunaut), RV32 register file design on SKY130: a novice's approach
• Diarmuid Collins (Slice Semiconductor), Open source design of a programmable gain instrumentation amplifier, with industry comparable accuracy / noise and common mode rejection performance across full process / voltage (±5%) / temperature (-40 → 125degC)

Foundries, PDKs and standard-cell libraries

• Rene Scholz (IHP Microelectronics), IHP openPDK and open-silicon MPW: pushing open-source EDA tools to productive chip design
• Leo Moser (wafer.space), Challenges of the first wafer.space shuttle run
• Mauricio Montanares (IHP Microelectronics), Open-source assembly design kit for heterogeneous chiplet integration
• Clyde Laforge (CERN), Towards a hassle-free GF180 KLayout flow (lightning talk)
• Jeremy Alcim (Loglib), logilib, portable parameterized digital library with multi-PDK dispatch (lightning talk)

Analog flow, transistor modelling and circuit simulation

• Arpad Buermen (University of Ljubljana), VACASK: One year toward a modern open analog simulation stack
• Robert Taylor (ChipFlow), Analog, GPUs, and AI. Oh my!
• Pepijn de Vos (NyanCAD), NyanCAD, or there and back again
• David Lanzendörfer (LibreSilicon), Visual ReAct-agents designing analog VLSI-FOSSi layouts in LibrePDK (lightning talk)
• Žiga Rojec (University of Ljubljana), LLMEDA: human-in-the-loop LLM-enabled analog topology synthesis with PyOPUS
• Felix Salfelder (Gnucap), Verilog-AMS in Gnucap (lightning talk)
• Simon Dorrer (Johannes Kepler University (JKU) Linz), From idea to tapeout: an open-source analog mixed-signal design flow with the IHP Open-PDK
• Kennedy Caisley (University of Bonn), Programmatic analog IC design (without reinventing the wheel)

Hardware security

• Sebastian Haas (Barkhausen Institute), M³ secure tape-out platform (lightning talk)

Economic sustainability and hardware licences

• Javier Serrano (CERN), The CERN Open Hardware Licence for IC and FPGA designs

Policy, EU projects and funding opportunities

• Tina Tauchnitz (VDI/VDE-IT), From initiative to impact: expanding Germany's chip design capabilities

Back-end design tools

• Yibo Lin (Peking University), DREAMPlace
• Daniel Schultz (aesc), BlenderGDS (lightning talk)
• Daniel Schultz (aesc), gdsfill (lightning talk)
• Ole Richter (DTU), A more modern way to design (open source) (memory) macro compilers
• Hagen Sankowski (LibreSilicon), WYSIWYG - "What you see is what you get?" - "Hopefully!" (lightning talk)
• David Kellerer-Pirklbauer (Johannes Kepler University (JKU) Linz), A fully-programmatic layout generation & verification flow for IHP-Open PDK PCells and RF-structures utilizing GDSFactory & Palace
• Mehta Stavan Dhaval (IIT Bombay), SAM-Route: a cornerstitch-based multi-layer router for ACT-generated custom cells
• Max Martin Paulenz (TU Dresden), OpenOrchestrator: schematic-driven layout with open-source EDA tools (lightning talk)
• Hao Wang (Institute of Computing Technology, Chinese Academy of Sciences), ECOS Studio: an RTL-to-chip silicon design solution with open-source EDA, IP, and PDK
• Jack Luar (Precision Innovations), OpenROAD Model Context Protocol (MCP) (lightning talk)

Teaching and education

• "One Student One Chip" initiative (Institute of Computing Technology, Chinese Academy of Sciences), "One Student One Chip" initiative: learn to build RISC-V chips from scratch with MOOC

Practical information

• Conference address:

Tržaška cesta 25
SI-1000 Ljubljana
Slovenia

• The location on OpenStreetMap
• FSiC2026 venue

Organizing committee

Lead organizers (overall coordination and local host)

Luca Alloatti

Libre hardware promoter

https://orcid.org/0000-0002-1245-4179

‟Technology is political. I stand for defending free access to technology and the right for transparency.”

Árpád Bűrmen

Professor at UL and local host

https://fides.fe.uni-lj.si/~arpadb/homepage.html

‟Open-source EDA transforms chip design from a gate-kept industry into an accessible skill for all.”

Thomas Kramer

Skeptical technology enthusiast

https://libreda.org

‟I like to understand technology, to adapt and enhance it. Technology should not be mythical or owned by experts only, it needs to be comprehensible.”

Programme co-organizers

Panos Alevropoulos

Lawyer and FSF volunteer

https://mastodon.social/@panosalevropoulos

‟For democracy to thrive, technology must empower, not control.”

Matthias Köfferlein

FOSS EDA author

https://www.klayout.org

‟I am passionate about helping people with my technical skills. Coding EDA is like gardening to me: may it grow and feed people.”

Martin Schoeberl

Professor at DTU

https://www.imm.dtu.dk/~masca/

‟Open-source tools and technology gives freedom to students to explore chip design on their own and on their computers, not limiting them to the walled garden of a dedicated lab at the University.”

René Scholz

Group Leader at IHP

https://github.com/IHP-GmbH

‟Our goal is to make open source EDA tools and design flows easily accessible and usable for anyone who wants to get into ASIC chip design, test new design ideas and develop them to a manufacturable level.”

Donations

We are looking for sponsors to cover extra services at the conference. In case of interest, please contact us at fsic2026'at'f-si.org.

Acknowledgements

This conference is co-funded by the Swiss State Secretariat for Education, Research and Innovation (SERI) under the NGI0 Commons Fund project. The NGI0 Commons Fund has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101135429.