Converting 45nm transistor netlists to open standards

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  • Speaker(s): Thomas Benz
  • email: thomas.e.benz (at) hispeed.ch

Abstract

The design of (analog) integrated circuits is predominately done with commercial tools. This includes the drawing of the schematic, the simulation, and the layout process. This talk focuses on simulating IC netlists on free and open-source software. The talk starts with outlying the key obstacle with simulating IC designs in FOSS, presents one solution a bit more in detail, and finally focuses on the open challenges that still need to be tackled.

Software

General information

Roadmap

Interfacing Software

  • Spectre2Spice is a standalone application, but could in theory be included in any simulator or schematic editor.
  • It can work together with any schematic editor, that can output netlists in SPICE, with any SPICE simulator, and with any library/PDK in the Cadence Spectre Circuit Simulator native language.

Future Improvements

  • The translator is operational, but not fully bug-free. Further testing is needed.
  • Until now only small designs were translated, translation and simulation of larger netlists is a goal.
  • Schematic editors should unify on a single symbol database and schematic format.
  • Schematic editors need to account for constraints and default values for their devices. Like only a channel length of Xnm is allowed.
  • As of now there is no satisfying way to communicate layout information between the schematic editor and the layout tool.

References